Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
1997-11-26
2001-03-06
Cabeca, John W. (Department: 2752)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S122000, C711S141000, C711S142000
Reexamination Certificate
active
06199143
ABSTRACT:
FIELD OF THE INVENTION
The invention broadly relates to the field of memory systems in data processing systems, and more particularly relates to the fields of fast-storing information and performing memory operations asynchronously. The invention selectively stores state information in parallel and manages memory operations for the central processing unit asynchronously. This saves processor time and speeds up computer applications.
BACKGROUND OF THE INVENTION
The process of storing or moving information within a computer system is often time consuming and inefficient. This can be seen in the cases of storing state information and in storing data to external memory.
The process of storing state information from a central processing unit's (“CPU's”) registers is usually accomplished by pushing the information onto the system's stack when the CPU is interrupted, and then popping the information off of the stack when the CPU resumes that task. Each of the registers is pushed and popped serially and the operations are all controlled by the CPU. The time required by the CPU is even greater in a context-switching or multi-tasking environment where this process occurs on a regular basis as the CPU switches between tasks that are incomplete.
The process of moving data between memory locations is also a time intensive operation for the CPU. In a memory swap operation, for example, the CPU needs to perform two reads and two writes on the external bus and an internal temporary store. When large blocks are moved, this process is repeated for every word, and it all needs to be controlled by the CPU. Note that this operation is different from the memory access operations of an inpuvoutput device which can often be controlled with a Direct Memory Access (“DMA”) Controller.
Accordingly, there is a need for a system of storing state information, and of storing or moving data in memory which overcomes the above problems.
SUMMARY OF THE INVENTION
A computer system comprises a CPU, a first at least one data storage device, electrically coupled to the CPU, for providing data storage to the CPU for CPU state information, and a second at least one data storage device, communicatively coupled to the first at least one data storage device and to the CPU, for selectively storing in parallel the CPU's state information that is also stored in the first at least one data storage device. A means for selectively controlling data transfer between the first and second at least one data storage devices, respectively, controls data transfer to selectively store CPU state information in the first at least one data storage device that is also stored in the second at least one data storage device.
A method comprises the steps of: storing a CPU's state information into a first at least one data storage delce, selectively storing in parallel the CPU's state information into a second at least one data storage device, and selectively controlling data transfer between the first and second at least one data storage devices, respectively, to selectively store the CPU's state information in the first at least one data storage device that is also stored in the second at least one data storage device.
REFERENCES:
patent: 3727192 (1973-04-01), Cheney et al.
patent: 5291604 (1994-03-01), Kardach et al.
patent: 5301331 (1994-04-01), Ueno et al.
patent: 5623632 (1997-04-01), Liu et al.
patent: 5809525 (1998-09-01), Bishop et al.
patent: 6047357 (2000-05-01), Bannon et al.
Microsoft Press, Computer Dictionary, 1997, p. 513.
August Casey P.
Buchenhorner Michael J.
Cabeca John W.
Fleit Kain Gibbons Gutman & Bongini P.L.
International Business Machines - Corporation
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