Computing device having instructions which access either a...

Electrical computers and digital processing systems: processing – Processing control – Processing control for data transfer

Reexamination Certificate

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Details

C712S208000, C712S228000, C711S005000

Reexamination Certificate

active

06795911

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a computing device such as a microprocessor employing a memory divided into banks.
Microprocessors capable of addressing multiple memory banks are well known in the computing art. The instruction set of a microprocessor of this type includes a bank selection instruction that sets a bank address in a bank register. Memory access instructions specify addresses that can apply to any bank. When a memory access instruction is executed, the address specified in the instruction is combined with the value in the bank register to generate an address specifying both a particular memory bank and a particular location in that memory bank.
If the software running on the microprocessor is of the multitasking type, different tasks or processes may use different memory banks. Typically, each process begins with a bank selection instruction that sets the address of the desired bank in the bank register. If necessary, the bank selection instruction can be executed again during the process to switch banks. If one process interrupts another, the bank register contents are saved onto a stack, and restored when the interrupting process ends, so that the interrupted process can resume use of the correct bank.
An advantage of this scheme is that the memory address space can be expanded beyond the size that can be addressed by any one memory access instruction, without increasing the bit length of the memory access instructions.
A disadvantage, however, is that saving and restoring the contents of the bank register delays the switchover from one process to the other. This is a particular disadvantage in real-time control systems requiring quick response to interrupts.
A further disadvantage is that every process must set the bank register to be sure that memory accesses will be directed to the correct bank. There may be, for example, many short processes that use only one memory bank, all sharing the same memory bank. Each of these processes must still start by executing the bank selection instruction, which adds an unnecessary instruction to the process code and further delays the start of the process.
These disadvantages could be overcome by adding bank selection bits to the memory access instructions, enabling each memory access instruction to specify both a memory bank and a location in the memory bank, but that would be a highly inefficient solution. Code size would be greatly increased, and extra circuits would be needed to analyze the added instruction bits, increasing the size and cost of the microprocessor itself. The expanded instructions would also be incompatible with existing instruction sets, requiring much conversion of existing software.
SUMMARY OF THE INVENTION
An object of the present invention is to enable a computing device to access multiple memory banks without requiring all processes to execute bank selection instructions.
Another object is to eliminate the saving and restoring of bank register contents.
The invented method of selecting a memory bank includes the steps of:
selecting a memory bank specified by a bank selection instruction for use by the next instruction executed after the bank selection instruction; and
automatically selecting a predetermined default memory bank following execution of any instruction other than the bank selection instruction.
The invented computing device has a bank register storing a value specifying one of a plurality of memory banks, and a bank control unit operating in a first state and a second state. In the first state, the bank control unit selects the memory bank specified by the bank register. In the second state, the bank control unit selects the predetermined memory bank.


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Intel Corporation, iAPX 86/88, 186/188 User's Manual—Hardware Reference, 1985, pp. 1-1 and 1-7 to 1-10.*
Harvey, R.E., 8086 Processor Registers, http://web.archive.org/web/19991111090421/http://ourworld.compuserve.com/homepages/r_harvey/doc_cpu.htm, 1999.

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