Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-01-31
2006-01-31
Peikari, B. James (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S124000, C711S119000, C711S204000, C711S213000
Reexamination Certificate
active
06993633
ABSTRACT:
A cache data control system and method for a computer system in which in a memory read processing, a coherent controller issues an advanced speculative read request for (speculatively) reading data from a cache data section in advance to a cache data controller, before reading a cache tag from a cache tag section and conducting cache hit check. If a cache hit has occurred, the cache data controller returns the data subjected to speculative reading as response data, at the time when the cache data controller has received a read request issued by the coherent controller.
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Akashi Hideya
Muraoka Satoshi
Ohara Isao
Sakakibara Tadayuki
Tsushima Yuji
Hitachi , Ltd.
Mattingly ,Stanger ,Malur & Brundidge, P.C.
Peikari B. James
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