Computer system including a receiver interface circuit with...

Details Computer system including a receiver interface circuit with... Computer system including a receiver interface circuit with...

2005-03-01

2005-03-01

Peikari, B. James (Department: 2186)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

C710S115000, C710S111000, C370S424000

Reexamination Certificate

active

06862639

ABSTRACT:
A computer system may include a processor, at least one memory coupled to the processor and having a plurality of scattered memory locations each having a pointer associated therewith, and a receiver interface circuit coupled to the at least one memory. The receiver interface circuit may include a scatter pointer queue for storing available pointers corresponding to available scattered memory locations. The scatter pointer queue may also store unavailable pointers corresponding to unavailable scattered memory locations. The receiver interface circuit may also include a receiver for receiving the data and writing the received data to the available scattered memory locations based upon the available pointers in the scatter pointer queue.

REFERENCES:
patent: 5016248 (1991-05-01), Kudoh
patent: 5610914 (1997-03-01), Yamada
patent: 5765023 (1998-06-01), Leger et al.
patent: 5781799 (1998-07-01), Leger et al.
patent: 5873089 (1999-02-01), Regache
patent: 5875472 (1999-02-01), Bauman et al.
patent: 5940404 (1999-08-01), Delp et al.
patent: 6192461 (2001-02-01), Williamson et al.

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