Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-10-10
2006-10-10
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S158000, C709S245000
Reexamination Certificate
active
07120756
ABSTRACT:
A computer system includes a system memory and a plurality of active devices configured to access data associated with the system memory through an address network and a data network. Each of the active devices may be configured to cache data, and may include a promise array. Transitions in ownership of the given block may occur at a different time than the time at which the access right to the given block is changed. The promise array of an active device is provided to store information identifying an unreceived data packet to be conveyed to another device in response to a pending transaction to a cache block for which the active device is an owner. Each active device may be configured to have at most one outstanding transaction for each cache block.
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Cypher Robert E.
Hagersten Erik E.
Landin Anders
Bataille Pierre-Michel
Kivlin B. Noäl
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Sun Microsystems Inc.
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