Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration
Reexamination Certificate
2000-02-10
2001-02-27
Heckler, Thomas M. (Department: 2787)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
Reexamination Certificate
active
06195749
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to computer systems and, more particularly, to memory resource utilization during system boot code execution.
2. Description of the Related Art
Current computer systems typically include a microprocessor, system memory, and a plurality of peripheral devices such as video graphics adapters, network controllers, modems, game controllers, and serial communications controllers. The memory and peripheral devices are typically coupled to the microprocessor through one or more system buses. In Personal Computers (PCs) these buses are controlled by bridge logic, which is commonly separated into two distinct Integrated Circuits (ICs): the system controller and the peripheral bus controller. The system controller commonly referred to as a northbridge in PC systems, includes such devices as a system bus interface, a memory controller, a Peripheral Component Interconnect (PCI) bus controller, and an Accelerated Graphics Port (AGP). The peripheral bus controller commonly referred to as a southbridge in PC systems, includes such devices as a PCI to Industry Standard Architecture (ISA) bridge, an Enhanced Integrated Device Electronics (EIDE) controller, and a Universal Serial Bus (USB) controller.
During the power-up sequence or after a system reset, the microprocessor must execute initialization code that is typically stored in an external Read-Only Memory (ROM). This code is referred to as Basic Input and Output System (BIOS) code. The BIOS is responsible for system level operations such as initializing and testing the system hardware. This portion of code is known as Power On Self Test (POST). The BIOS is also responsible for loading and running the system software in a bootstrap routine. In addition, the BIOS manages the system default, or setup hardware conditions and helps the system software manage system resources during normal system operation through the use of BIOS run-time services.
A problem associated with current computer systems is that prior to the POST routine initializing and testing the main system memory, the microprocessor has relatively few registers to use as a stack or scratchpad memory. As computer systems continue to increase in complexity, this lack of memory makes writing BIOS code increasingly more difficult as the BIOS code is required to do more. Therefore, it is desirable to have access to some memory space during the execution of the POST.
SUMMARY OF THE INVENTION
The problems outlined above may in large part be solved by a computer system including a memory access controller for using non-system memory storage resources during system boot time.
In one embodiment, the computer system includes a microprocessor coupled to a system memory through a system controller, such as a northbridge. A peripheral bus controller, such as a southbridge, may be coupled to the system controller through a first peripheral bus. One or more peripheral devices may be coupled to the system controller through the first peripheral bus. Additionally, one or more peripheral devices may be coupled to the peripheral bus controller through a second peripheral bus. A memory unit for storing boot code, such as a BIOS ROM, may be operatively coupled to the microprocessor through the peripheral bus controller for storing boot code to allow the system to perform initialization procedures. The computer system includes a memory access controller for controlling accesses to a buffer memory associated with one of the peripheral devices during system initialization to advantageously allow use of the buffer memory as a stack or scratchpad random access memory (RAM).
In one particular implementation, a buffer memory associated with a Local Area Network (LAN) controller, which is configured in a first in/ first out (FIFO) arrangement, may advantageously be utilized as stack or scratch pad RAM during system initialization.
In other embodiments, the buffer memory associated with other peripheral devices may be utilized during system initialization. For example, in one embodiment, storage such as a cache memory associated with a disk controller may be configured and utilized as a stack or scratch pad RAM.
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Advanced Micro Devices , Inc.
Conley Rose & Tayon PC
Heckler Thomas M.
Kivlin B. Noäl
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