Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
1998-06-04
2002-12-17
Hayes, Gail (Department: 2131)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S006130
Reexamination Certificate
active
06496945
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to fault detection in computer systems. More particularly, the invention relates to the use of unique device identification codes stored in non-volatile memory to track failed devices in a computer system. Still more particularly, the present invention relates to a system in which failed components may be tracked physically through the use of stored or embedded identification codes.
2. Background of the Invention
A personal computer system includes a number of components with specialized functions that cooperatively interact to produce the many effects available in modem computer systems. These components typically include one or more central processing units (CPU's), an array of random access memory (RAM) modules, and certain peripheral devices such as a floppy drive, a keyboard, and a display. The components generally are interconnected by one or more “busses.” A bus is a collection of digital signal lines over which data, address, and control signals are conveyed between devices connected to the bus according to a predetermined protocol. Examples of industry standard bus protocols include the Peripheral Component Interconnect (PCI) bus, the Industry Standard Architecture (ISA) bus, and Universal Serial Bus (USB).
For a computer system to operate successfully and efficiently, its components must function correctly. To ensure proper operation in the event of a failed component, the computer system must be capable of (1) detecting the failure, and (2) isolating the failed component so it is no longer accessed. Accordingly, many computer systems include logic for detecting when a device has failed and isolating the failed device to prevent its subsequent use by other devices (such as the CPU) in the computer system. Although the sophistication of personal computer systems continues to increase, there continues to be a concern that components may fail during operation. To protect against this eventuality, fault detection systems continue to play an important role in the operation of computer systems. The present invention relates to an improved fault detection and isolation technique.
To understand conventional fault detection and isolation schemes, it is important to understand the interaction between the computer's hardware components and the operating system (e.g., Windows® 95). Application software, such as a word processor or game, uses the operating system to access the computer's hardware components to manipulate data. For example, a particular application program may require access to data on a hard disk drive. The operating system translates a data access request from the application program into one or more device level operations to obtain the requested data for the application program. The application program need not access the hard disk directly, but does so indirectly via the operating system.
Many devices, such as system memory and the CPU are assigned a “logical” address during system initialization (“boot-up”). As such, it is common to refer to a “physical” device or a “logical” device; the physical device refers to the actual hardware device, and the logical device and refers to the device as it is mapped into the logical address space. For example, system memory may comprise 4 megabyte (MB) dual in-line memory modules (DIMM's). Each physical DIMM, therefore is a 4 MB “physical” DIMM. During boot-up, each physical DIMM is assigned a 4 MB logical address range. One physical DIMM might be assigned the 0-4 MB address range, while another DIMM might be assigned the 4-8 MB address range. The operating system accesses a particular memory location in each DIMM typically by using its starting logical address (0, 4 MB, etc.), and also an offset from the starting logical address to the targeted memory location.
Assigning logical addresses to physical devices permits efficient use of the computer's physical resources by the operating system and applications software. Software can then be developed to run on computers with different hardware configurations; the software need only be aware of the logical addresses of the various devices. Further, if a user moves a physical device from one location in the computer to a new location, the logical address assignment may change (during boot-up) and the computer's software and operating system will be unaffected other than being made aware of the device's new logical address.
Most computer systems run various tests during boot-up in a process generally referred to as “power on self test”(POST). The POST routines are part of the Basic Input Output System (BIOS) code that is stored in read-only memory (ROM) and executed by the CPU. During execution of the POST routines, the various devices in the computer system, such as the CPU and memory, are tested to ascertain whether each device is working properly. Different types of devices are tested in different ways. Memory, for example, is tested by writing (i.e., storing) a known test data value to the memory device to be tested, and then reading (i.e., retrieving) the data value from the memory device to ensure the value read matches the value written. If a match does not exist, the memory is deemed defective; otherwise, the device is assumed to be functional. A CPU typically includes logic to test itself. The operational state of a CPU can be ascertained by the BIOS code reading the contents of various status registers internal to the CPU that indicate the CPU's functional states. Device testing also occurs to a certain extent after POST while the computer system is undergoing normal operation.
After the computer's hardware devices are tested, the BIOS code provides the operating system with a Logical Resource Map (LRM) which includes the logical addresses of only those devices that are fully functional. The operating system will not permit access to those logical devices not listed in the LRM, thereby isolating those devices from use in the computer. Further, if a device fails during operation of the computer and the failure is detected, the logical resource map is changed to indicate to the operating system that the failed device is no longer available.
The CPU also uses the BIOS code to maintain a list of failed logical devices in a “failed device log” (FDL) stored in non-volatile memory (i.e., memory whose contents are not erased when power is removed from the device). During boot-up, the BIOS code reads the failed device log to determine which logical devices were previously reported as failed. As the BIOS code creates the logical resource map to be provided to the operating system, the BIOS code will not include those logical devices that have been reported previously as failed. Accordingly, fault detection and isolation involves determining that one or more of the computer devices is defective, and prohibiting further access to that device by the operating system even after the computer has been turned off and then re-started.
The user, however, may wish to take remedial actions when the computer reports the presence of a failed device. For example, if the BIOS code determines that a CPU is defective, the user may replace the defective CPU with a new CPU. If a memory device has failed, the user may wish to replace the defective memory device or simply add additional memory modules without removing the defective device. In some situations, only a portion of the memory device has failed and most of the memory locations in the memory device may still be fully functional. As such, the user may not wish to replace the memory device. Instead, the user may leave the partially defective memory device in the computer and add an additional memory device to make up for the loss of memory capacity resulting from the defective memory locations.
When repairs or alterations to the computer configuration are made, the possibility exists that the FDL will no longer match the physical configuration of the computer. The following examples illustrate this pro
Cepulis Darren J.
Young, Jr. Sid
Compaq Information Technologies Group L.P.
Conley & Rose & Tayon P.C.
Hayes Gail
Heim Michael F.
Revak Christopher
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