Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2005-07-05
2005-07-05
Anderson, Matthew D. (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S137000, C711S213000, C711S217000
Reexamination Certificate
active
06915404
ABSTRACT:
A computer system includes a read ahead engine that receives a sequence of read requests and performs read ahead operations in accordance with various patterns detected within the sequence of read requests. The prefetch engine may implement the method of storing a first run value indicative of the run size of a first plurality of sequential read requests, and storing a first skip value indicative of a non-sequential skip associated with a subsequent read request. The method may further include determining whether a second run value indicative of the sequential run size of a second plurality of read requests equals the first run value, and whether a second skip value indicative of another non-sequential skip associated with an additional read request equals the first skip value. If the first run value equals the second run value, and the first skip value equals the second skip value, a stride pattern is indicated, and one or more read ahead operations according to the detected stride pattern may be initiated.
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Colgrove John
Desai Samir
Varadarajan Ganesh
Anderson Matthew D.
Kivlin B. Noäl
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Patel Hetul
VERITAS Operating Corporation
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