Computer system having cache prefetching amount based on CPU req

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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395383, G06F 1200, G06F 1300

Patent

active

058025693

ABSTRACT:
A computer system is provided which includes a central processing unit (CPU), a main memory, cache memory and a cache controller. The CPU generates a first CPU control signal indicating whether a CPU request is a request for instruction or data and a second CPU control signal indicating whether a request is for retrieving information from memory or for storing information into the memory. The cache controller includes prefetch logic which is responsive to the type of request from the CPU, such as, for example, instruction or data, read or write, for determining the amount of data to be prefetched into the cache memory from the main memory.

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