Computer system having a hot swappable hot swap controller

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus expansion or extension

Reexamination Certificate

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Details

C710S301000, C714S005110

Reexamination Certificate

active

07000053

ABSTRACT:
A computer system is adapted for dynamic replacement of a hot swap controller card. The computer system includes a circuit board, with the computer system comprising a first slot and a second slot coupled to the circuit board. The first slot includes a first connector and the second slot includes a second connector. The first and second connectors each have a column and row arrangement of connector-pins, with the first connector including first, second and third connector-pins and the second connector including fourth, fifth and sixth connector-pins. First, second, third, fourth, fifth and sixth signal lines are connected to the first through sixth connector-pins, respectively. A primary hot swap controller has a first means for simultaneously turning on/off a first plurality of switches, a second means for driving signal lines connected to the first, second, fourth, and fifth connector-pins, and a third means for storing a status information of the signal lines. A backup hot swap controller has a fourth means for simultaneously turning on/off a second plurality of switches, a fifth means for driving the signal lines connected to the first, second, fourth, and fifth connector-pins and for storing a status information of the signal lines. During a normal operation of the computer system, the first means turns on the first plurality of switches such that the second means drives the signal lines connected to the first, second, fourth, and fifth connector-pins and the fourth means turns off the second plurality of switches. During a backup operation of the computer system, the first means turns off the first plurality of switches and the fourth means turns on the second plurality of switches such that the fifth means drives the signal lines connected to the first, second, fourth, and fifth connector-pins according to the status information stored in the fifth means.

REFERENCES:
patent: 6026458 (2000-02-01), Rasums
patent: 6145099 (2000-11-01), Shindou
patent: 6260092 (2001-07-01), Story et al.
patent: 6324485 (2001-11-01), Ellis
patent: 6591324 (2003-07-01), Chen et al.
PCI Local Bus Specification, Production Version, Revision 2.1. Jun. 1, 1995. Chapters 1 and 2, pp. 1-19.

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