Electrical computers and digital processing systems: support – Reconfiguration
Reexamination Certificate
1998-02-18
2001-08-28
Courtenay, III, St. John (Department: 2151)
Electrical computers and digital processing systems: support
Reconfiguration
C710S261000, C713S340000
Reexamination Certificate
active
06282645
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a laptop or note-book type portable personal computer system and, more particularly, to a computer system for interfacing different programs.
2. Description of the Related Art
In recent years, high-performance microprocessors have been developed with the advance of semiconductor techniques. A high-performance microprocessor is used as a CPU for a laptop or notebook type portable personal computer system.
Typical examples of such a CPU are Intel386 and Intel486 CPUs available from Intel, U.S.A. Such a CPU has two operating modes called a real mode and a protect mode. The real and protect modes employ different memory addressing schemes. In the real mode, the maximum accessible memory space is a 1-Mbyte area. In the protect mode, a maximum of 4-Gbyte memory area per task is accessible.
Operating systems executed by personal computer systems have been recently developed, and an operating system supporting a multitask function is gradually used. Most of such high-performance operating systems are configured to operate in the protect mode.
In a personal computer, a program called a system BIOS (Basic I/O System) for only hardware access is used to set hardware and the operating system in the system independent of each other and release the operating system from hardware access control. This system BIOS includes a plurality of function execution routines for hardware access. These function execution routines provide functions of performing various hardware access operations to the operating system.
The function execution routines of the system BIOS are realized by CPU software interrupt instructions (INT instructions). For this reason, the operating system calls a desired function execution function in accordance with an INT instruction to perform necessary hardware control
However, all the system BIOS function execution routines are designed to be operated in the real mode because the system BIOS is arranged on an assumption that an operating system is executed in the real mode.
For this reason, the following operation must be performed. In an operating system environment set in the protect mode, as shown in
FIG. 1
, after the CPU operating mode is temporarily changed from the protect mode to the real mode, an INT instruction is executed to call a corresponding function execution routine. When this function execution routine is completed to cause the control to return to the main routine, the real mode must be changed to the protect mode again.
For this reason, when an operating system operating in the protect mode is used, a routine for changing the CPU operating mode and a routine for calling the function execution routine of the system BIOS in accordance with the INT instruction must be built into the BIOS interface portion of the operating system, thereby undesirably complicating coding.
In a conventional case, the routine for changing the CPU operating mode must be built into the BIOS interface portion such as an operating system operating in the protect mode, thereby undesirably complicating coding.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a computer system capable of allowing use of a CPU system management function to interface programs operated in different environments as in a program such as an operating system operating in a protect mode and an BIOS function execution routine operating in a real mode, and for allowing easy access of the BIOS function execution routine from an operating system or the like operating in the protect mode, and a method of interfacing the programs in this computer system.
A computer system according to the present invention comprises: a CPU having a first operating mode using a first address calculation form and capable of accessing a predetermined memory space, a second operating mode using a second address calculation form different from the first address calculation form and capable of accessing a memory space larger than that in the first operating mode, and a system management mode using an address calculation form substantially identical to the first address calculation form and capable of executing a predetermined system management program, the CPU being operated such that after CPU status data is saved in a memory in response to supply of a predetermined interrupt signal to the CPU, a current CPU operating mode is switched to the system management mode, contents s of the memory are restored in a CPU register in response to execution of a resume instruction in the system management mode, and the operating mode set before the interrupt signal is supplied is resumed from the system management mode; an interrupt signal generator, connected to the CPU through a system bus, for trapping an I/O address on the system bus which belongs to an address range designated by a predetermined I/O base address, thereby generating the interrupt signal; and an interface means for interfacing a second program configured to be operated in the second operating mode and a first program configured to be operated in the first operating mode, the interface means further comprising means for, in response to a call request for the first program from the second program executed by the CPU in the second operating mode, executing an I/O instruction to the I/O port belonging to the address range designated by the I/O base address to cause the interrupt signal generator to generate the interrupt signal, means for, when the CPU is switched to the system management mode in accordance with the interrupt signal, executing the system management program to call the first program and causing the CPU in the system management mode to execute the first program, and means for executing a resume instruction in response to execution completion of the first program so as to change the system management mode of the CPU to the second operating mode in which the second program was being executed.
In this computer system, the interrupt signal by I/O trapping is used to interface the second program such as an operating system and the first program such as a BIOS program. The interface means causes the interrupt signal generator to generate an interrupt signal caused by I/O trapping upon execution of an IN or OUT I/O instruction for a specific I/O port in response to a call request from the second program to the first program. The interface means then causes the CPU in the system management mode to execute the first program and executes the resume instruction in response to its execution completion. The address calculation form of the system management mode is the same as the address calculation mode in the first operating mode accessible by the first program. For this reason, the first program can be normally executed in the system management mode.
The CPU switches the second operating mode, in which the second program is currently executed, to the system management mode in response to generation of an interrupt signal. The CPU then saves the CPU status data in the memory. When the resume instruction is executed, the CPU restores the CPU status data from the memory to resume the second operating mode from the system management mode. Therefore, control returns to the second program executed immediately preceding generation of the interrupt signal.
As described above, in this system, when a call request for the first program is generated in the second operating mode, the CPU is automatically switched to the system management mode, and the first program is executed. Thereafter, the mode is switched from the system management mode to the second operating mode. Therefore, the first program is directly called from the second program and can be executed without building a CPU operating mode switching routine into the second program.
A procedure necessary for generating an interrupt signal is to cause the interface means to execute the IN or OUT instruction because the interrupt signal caused by I/O trapping is used. Therefore, the first program can be called at high speed
Courtenay III St. John
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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