Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-08-29
2006-08-29
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C713S001000
Reexamination Certificate
active
07100088
ABSTRACT:
A method of initializing a computer system equipped with a debugging system. The computer system has a ROM coupled to an expansion bus and stores a first BIOS code, and the debugging system is coupled to a peripheral bus. The method comprises the steps of routing data requests directed to the ROM to a local bus by a CPU, transferring the data requests from the local bus to the peripheral bus via a first bridge, switching a second bridge into normal mode wherein the second bridge is enabled to respond to data requests on the peripheral bus with the first BIOS code stored in ROM to be loaded in the CPU, and switching the second bridge to debugging mode wherein the second bridge is disabled from responding to data requests on the peripheral bus, instead, the debugging system responds to data requests with the second BIOS code to be loaded in the CPU.
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Beausoliel Robert
Rabin & Berdo P.C.
Riad Amine
Via Technologies Inc.
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