Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-10-17
1999-02-09
Lall, Parshotam S.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711207, 395585, G06F 900, G06F 1200
Patent
active
058705996
ABSTRACT:
Streaming buffer renaming for memory accesses issued by a microprocessor to an external memory via a system bus allows up to N fetch accesses at any one time for M physical streaming buffer locations, where N is greater than M. When a fetch within the processor misses the instruction cache, the fetch address is placed in the streaming buffer. When the data has been fetched from the external memory, it is returned to the streaming buffer and placed into one of the M physical buffer locations. The data within the streaming buffer is returned to the instruction cache of the processor only if it is to be used in accordance with the computer program being executed.
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Gupta Ashwani K.
Hinton Glenn J.
Shenoy Sunil R.
Coulter Kenneth R.
Intel Corporation
Lall Parshotam S.
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