Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent
1997-11-13
1999-12-21
Bragdon, Reginald G.
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
711137, 711162, 711168, G06F 1216, G06F 1316
Patent
active
060063076
ABSTRACT:
A computer system includes a mirrored memory system, in which each bank is coupled to a different channel from the one or more microprocessors included in the computer system. Each microprocessor is coupled to a fetch channel for performing fetch operations from one of the mirrored memory banks within the computer system. Additionally, each microprocessor is coupled to a prefetch channel for performing prefetch operations from a different one of the mirrored memory banks. In multiprocessor configurations, the microprocessors may share the fetch channel and/or the prefetch channel, or may be provided with separate channels for either fetch or prefetch operations. Prefetch operations do not interfere with fetch operations from the same microprocessor. Additionally, prefetch operations are not preempted by fetch operations (except for write operations which update all memory banks, if the memory banks do not include write queues). Still further, fetch operations from one microprocessor in a multiprocessor configuration do not interfere with prefetch operations from another microprocessor.
REFERENCES:
patent: 5495570 (1996-02-01), Heugel et al.
Bates, Kenneth and Marvin TeGrotenhuis, "Shadowing Boost System Reliability", Computer Design, Apr. 1985, pp. 129 (6).
Park, Hyang Jae and Heonshik Shin, "Real-Time Disk Scheduling Techniques for Mirrored Disk Systems", TENCON '94. IEEE Region 10's Ninth Annual International Conference. Aug. 1994, pp. 474-480.
Patterson et al., Computer Architecture A Quantitative Approach, Morgan Kaufmann Publishers, Inc., 1990, pp. 520-521.
Advanced Micro Devices , Inc.
Bragdon Reginald G.
Kivlin B. Noel
Merkel Lawrence J.
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