Computer system, compiler apparatus, and operating system

Details Computer system, compiler apparatus, and operating system Computer system, compiler apparatus, and operating system

2008-09-09

2008-09-09

Shah, Sanjiv (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S118000, C711S167000, C711S168000, C711S213000, C712S237000, C712S239000

Reexamination Certificate

active

10885708

ABSTRACT:
A compiler apparatus for a computer system capable of improving the hit rate of a cache memory, which includes a prefetch target extraction device, a thread activation process insertion device, and a thread process creation device. The compiler apparatus creates threads for performing prefetch and prepurge. Prefetch and prepurge threads created by this compiler apparatus perform prefetch and prepurge in parallel with the operation of the main program, by taking into consideration program priorities and the usage ratio of the cache memory.

REFERENCES:
patent: 5473764 (1995-12-01), Chi
patent: 5822759 (1998-10-01), Treynor
patent: 11-212802 (1999-08-01), None
patent: 11-306028 (1999-11-01), None

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