Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2001-06-19
2004-03-09
Gossage, Glenn (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S102000, C711S165000, C711S166000, C711S170000, C713S001000, C713S002000
Reexamination Certificate
active
06704840
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to computer initialization with caching and more particularly, the present invention relates to a technique which allows pre-boot software to cache the Programmable Attribute Map (PAM) areas used by option Read Only Memories (ROMs) to achieve faster initialization.
In currently used option ROM initialization techniques, the physical memory region of C000h, D000h, E000h and F000h segments (below 1 MB) are usually referred to as the Programmable Attribute Map (PAM) region(s). Typically the E000h and F000h segments (128K) are used by the System basic input/output system BIOS runtime code and the C000h and D000h segments are used by the Option ROM code (128K). The chipset provides the PAM attributes of Disabled, Read Only, Read/Write and Write-Only.
The following PAM attributes are utilized during the pre-operating system boot software execution.
1) Write-Only: This PAM attribute is used while copying the Option ROM to PAM memory
2) Read/Write: This PAM attribute is used while the Option ROM is given control and executing.
3) Read Only: This PAM attribute is used while the Option ROM has finished initialization and is being used for normal operation.
The Pre-OS boot software executes the following steps, for example, for Option ROM initialization:
1) The Option ROM code gets copied from a Flash memory firmware hub (FWH) for integrating Onboard components, and from the Peripheral Component Interconnect (PCI) Option ROM memory for PCI add-in cards to the PAM memory region (C000h and D000h) of the physical memory.
2) Pre-OS boot software gives control to the Option ROM for execution (Video BIOS, small computer system interface (SCSI) BIOS and Network BIOS) at different times during power-on self test (POST) execution.
3) The execution of the Option ROM code is completed.
4) The Pre-OS boot software continues with the normal tasks and enables caching for the PAM region.
In the current implementation of BIOSs of original equipment manufacturers (OEMs) and BIOS vendors, the PAM region is kept un-cacheable during the Option ROM initialization of the Video BIOS, SCSI BIOS and Network BIOS, etc., which increases the boot time so as to be on the order of seconds for multiple Option ROM execution(s).
The PAM memory area holds critical data that is necessary for the loading of the OS drivers (for example, Video drivers, SCSI drivers & Network drivers). Accordingly, the normal usage of the PAM attribute in the memory controller chipset is “Read Enable” after the shadowing of the Option ROM's and System BIOS runtime code. This is done to protect the contents of the PAM area.
The PAM memory area holds very critical data used by various OS drivers (Video drivers, SCSI drivers, Network drivers, OS Kernel loader using the INT15h e820, ACPI table pointer, Plug and Play Pointer, SMBIOS pointer, INT13h runtime interrupts used for loading the OS image, etc.)
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“Method to Create an Initialization Mode CPU Cache,” Research Disclosure Journal, RD 434034, Jun. 10, 2000, pp. 1-2.
Nalawadi Rejeev K.
Siddiqi Faraz A.
Gossage Glenn
Schwegman Lundberg Woessner & Kluth P.A.
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