Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent
1996-10-28
1999-08-17
Gossage, Glenn
Electrical computers and digital processing systems: memory
Address formation
Address mapping
711102, 395888, 395652, G06F 1210, G06F 1300, G06F 500
Patent
active
059408715
ABSTRACT:
A system and method for compressing portions of the operating system in a ROM image and for executing the system from the compressed image. Compression is used to reduce the size of the ROM image to reduce component cost. Low use segments are compressed. The operating system is initialized into a virtual address space with entries only for the uncompressed segments. Attempts to execute a compressed segment result in a page fault. The page fault handler determines that the segment is compressed, allocates a new page and decompresses the page into RAM for execution. The RAM copy of the segment is used for execution until the page is reused for another purpose. Later execution causes a new page fault and reallocation.
A memory object reference is created for components of the image; a virtual memory page reference is then made for each component not in a compressed form; instructions are then executed by reference to the image; a page fault is detected when attempting to execute an instruction in a component not having a page table reference; a compressed image is then decompressed into the random access memory in response to the page fault.
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Goyal Prabhakar
Harish Grama Kasturi
Heath James Darrell
Jagannadhan Chakravarthy
Venkataramappa Vishwanath
Carwell Robert M.
Gossage Glenn
International Business Machines - Corporation
Walker Mark S.
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