Computer system and method for efficiently controlling the openi

Details Computer system and method for efficiently controlling the openi Computer system and method for efficiently controlling the openi

1997-01-14

1999-08-17

Gossage, Glenn

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

711105, 711122, 711137, 3652385, 365193, 365203, G06F 1200, G11C 11407

Patent

active

059408480

ABSTRACT:
A computer system including a processor and a storage device and a method for accessing at least one page of the storage device, are described. The computer system further includes a control circuit coupled to the processor and to the memory device. The control circuit is configured to change a state, such as open or closed, of the at least one page, when one of a page miss and row miss cycle to that at least one page is aborted. The control circuit is configured to restore the state of the at least one page a predetermined number of cycles after the state of the at least one page was changed. Performance benefits may be obtained in a computer system including a second level (L2) cache if upon a page miss or row miss cycle that has been aborted, the state of a page previously accessed is restored. The paging process efficiently controls the opening and closing of pages and takes into account the system architecture and the occurrence of certain events such as a host bus being idle, a cycle being aborted, etc.

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