Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-07-18
2006-07-18
Baderman, Scott (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S046000
Reexamination Certificate
active
07080284
ABSTRACT:
A computer server architecture and diagnostic framework for testing same is described. The diagnostic infrastructure consists of various logical modules present on both service processor-side and platform-side regions of a server. These modules work together to present a modular, extensible yet unitary diagnostic framework. The invention permits dynamic operation of information resources, and extensibility when/if expansion is needed. The server architecture includes an OS independent, custom ASIC and processors configured in a 4-way geometry which permits scalable expansion up to a 16-way configuration geometry within a SMP programming model. The server architecture is capable of integration with third party management frameworks, for example, SNMP and CIM, and is modularly scalable, i.e., offers a “one to many” management capability. The server architecture is capable of both 32-bit and 64-bit computing, and the 64-bit computing ability is 32-bit application backward compatible, offering the advantage of a non-disruptive migration to 64-bit computing.
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Sanders Richard Lee
Zeevi Josef
Baderman Scott
Chu Gabriel
Galasso Raymond M.
Galasso & Associates LP
Newisys Inc.
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