Computer program product for implementing uncertainty in...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07131098

ABSTRACT:
Disclosed is a method, system and computer program product to specify an integrated circuit. The integrated circuit includes a hardwired specific logic technology portion and a programmable specific logic technology portion. The method includes generating a hybrid logic network by mapping each uncertain logic function to an abstract programmable logic element implementation thereof and by mapping each known logic function to a technology-independent logic element implementation thereof; simplifying the hybrid logic network using logic synthesis optimizations; mapping the simplified hybrid logic network to a specific technology by mapping the abstract programmable logic element implementation to the specific programmable logic technology and the technology-independent logic element implementation to the specific logic technology; and further includes optimizing the mapped network to meet performance constraints. Generating involves using integrated circuit specification language extensions that include an Uncertain Function that is used in place of a logic function or operator, an Uncertain Function Assertion for imposing at least one constraint on the Uncertain Function, an Uncertain Register for a register having a programmable size within a specified range and an Uncertain Constant.

REFERENCES:
patent: 5822760 (1998-10-01), Yoshizawa et al.
patent: 6148436 (2000-11-01), Wohl
patent: 6226777 (2001-05-01), Zhang
patent: 6240376 (2001-05-01), Raynaud et al.
patent: 6256770 (2001-07-01), Pierce et al.
patent: 6618841 (2003-09-01), Huang
patent: 2004/0230934 (2004-11-01), Taylor et al.

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