Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2011-01-18
2011-01-18
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C029S847000
Reexamination Certificate
active
07873933
ABSTRACT:
A computer program for balancing power plane pin currents in a printed wiring board (PWB) provides for reduction in pin counts required for power plane (including ground plane) connections and/or reduction in requirements for connector current handling per pin. One or more slots is introduced in the metal layer implementing the power plane that alter the current distribution in the power plane. The per-pin current profile for connector pins connected to the power plane is equalized by tuning the length of the slot(s). The slots may be dashed or made internal to the power plane metal layer to avoid weakening the metal layer for laminated multi-layer PWBs and may be shaped around a connector end when the power plane pin allocation is not uniform at the connector ends. The resulting equalization reduces either pin count required for carrying the power plane current or reduces connector pin current requirements.
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“Using Allegro PCB SI to Analyze A Board's Power Delivery System From Power Source To Die Pad” , pp. 1-11, by Juergen Flamm of Cadence Design System, @2002.
Harrer Hubert
Huber Andreas
Winkel Thomas-Michael
Baca Matthew W.
Dinh Paul
Harris Andrew M.
International Business Machines - Corporation
Mitch Harris Atty at Law, LLC
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