Electrical computers and digital processing systems: support – Computer power control – Power conservation
Reexamination Certificate
2000-02-04
2004-06-15
Lee, Thomas (Department: 2115)
Electrical computers and digital processing systems: support
Computer power control
Power conservation
C713S322000, C713S323000
Reexamination Certificate
active
06751741
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a power management apparatus and a power management method in a computer system, and more particularly to a power management apparatus and a power management method for optimizing a CPU throttling operation.
BACKGROUND OF THE INVENTION
To reduce the power dissipation of a computer system a great deal of effort has been made. As a result, various techniques of reducing power dissipation have been developed. As one example of the techniques, there is a method of controlling a CPU clock. The CPU clock control method is roughly classified into 3 operations: a stop grant operation, a stop clock operation, and a CPU throttling operation.
(1) The stop grant operation is a method of operating an external clock but stopping only a CPU internal clock. It takes time not more than 1 &mgr;s to return to an active state.
(2) The stop clock operation is a method of stopping the external clock in addition to the CPU internal clock. This operation can further suppress power dissipation, compared with the stop grant operation. However, since the external clock is also stopped, it takes 0.5-1 ms to return to the active state.
(3) The CPU throttling operation is a method of reducing an operating frequency of a CPU falsely and suppressing power dissipation, by making a periodic transition alternately between a stop grant state and an active state.
In actual applications, either one or the other of the following methods is usually adopted.
(a) Use only one of the above-mentioned operations (1)-(3); or
(b) execute either the stop clock operation or the stop grant operation, while performing the CPU throttling operation.
Under the circumstances where there are many activities, however, the operating system (OS) will not issue a CPU-idle call and therefore a chance to go into the stop grant operation or the stop clock operation will not be obtained. For this reason, under the circumstances where there are many activities, it is practically impossible to execute the stop grant operation or the stop clock operation. To realize low power dissipation even in such circumstances, there is a need to execute the CPU throttling operation that can be controlled by hardware which is not influenced by the OS.
The selection of executing the CPU throttling operation or not is performed by a user in initializing the system. The operation of the CPU clock control method, in the case where a user selects the CPU throttling operation when initializing the system, will be described in reference to a flowchart shown in FIG.
4
.
When power is turned on, the system is performing the CPU throttling operation (step S
1
). At this time, if the operating system issues a CPU idle call (step S
2
), the system stops the CPU throttling operation and makes a transition to either the stop clock state or the stop grant state. The system judges whether or not there is activity, in order to determine which transition it makes (step S
3
). If there is no activity (No), the system makes a transition to the stop clock state (step S
4
). If there is activity (Yes), the system makes a transition to the stop grant state (step S
5
). When the system is in the stop clock state (step S
4
) or the stop grant state (step S
5
), if a stop brake event occurs, the system returns to the active state and restarts the CPU throttling operation (step S
1
). Thereafter, the above-mentioned steps are repeated.
The state in which there is no activity in a system, as in the state in which there is no process, is called an idle state. When a user is executing a task that does not require CPU power so significantly, the greater part of the system driving time is occupied by the idle state which waits for input from a user. Therefore, a reduction in the power dissipation of a computer system depends upon the suppression of power dissipation in the idle state.
FIG. 5
is a diagram showing an example of the state transition of a CPU in the case where a system executes CPU throttling operation when it is in an idle state. In the diagram there is shown the case where the throttling duty is 100%, 50%, 25%, and 12.5%. As described above, the CPU throttling operation is performed when the CPU makes a periodic transition between an active state and a stop grant state. The throttling duty ratio is the ratio of a period during which the CPU is in the active state to a total period during which the CPU is in the active state and stop grant state during CPU throttling operation. Therefore, in the case of a 100% throttling duty ratio, the CPU is in the active state for the full period. Conversely speaking, the stop grant period is zero, so there is no CPU throttling operation. In the case of a 50% throttling duty ratio, the CPU is in the active state for only half the total period. In the case of a 25% throttling duty ratio, the CPU is in the active state for only one-fourth the total period. In the case of a 12.5% throttling duty ratio, the CPU is in the active state for only one-eighth the total period. From the viewpoint of reducing power dissipation in a system, a smaller throttling duty ratio is advantageous. The reason is that, if the throttling duty ratio is smaller, the ratio of the period during which the CPU is in the active state will become smaller. In
FIG. 5
, the horizontal axis indicates a system timer T along with time t.
In the stop clock state, power dissipation can be maximally suppressed, because an external clock is also stopped, as described above. However, as will be seen from
FIG. 5
, if CPU throttling operation is performed, the period during which the CPU is in the stop clock state will be shortened. Furthermore, this period will become shorter if the throttling duty ratio is reduced. That is, if CPU throttling operation is performed for reducing power dissipation of the system, the power dissipation will increase to the contrary. Moreover, if the throttling duty ratio is made smaller to obtain a further reduction in the power dissipation, the power dissipation will conversely increase.
The system returns from the stop grant state or the stop clock state to the active state by a stop brake event. When the system is in the idle state, the stop brake event of returning the system from the stop clock state is only an interruption by the system timer T. The system timer T occurs periodically and the period depends upon an operating system (OS). For instance, the period is 13.75 ms for Windows 95 (trademark) and 5 ms for Windows 98 (trademark). Therefore, between Windows 95 (trademark) and Windows 98 (trademark), the ratio of the stop clock state to the system timer T differs.
FIG. 6
is a diagram showing the state duty ratio of the CPU for comparison of different system timers. FIGS.
6
(
a
) and
6
(
b
) show the case of Windows 95 (trademark) and the case of Windows 98 (trademark), respectively. As shown in
FIG. 6
, if in Windows 98 (trademark) the throttling duty ratio is set to 12.5%, the ratio of the stop clock state will be reduced down to about 50%.
From
FIGS. 5 and 6
it follows that:
(1) If, in CPU throttling operation, the throttling duty ratio is made smaller, the ratio of the stop clock state to the system timer will become smaller.
(2) If the period T of the system timer is shorter, the ratio of the stop clock state to the system timer will become shorter.
As described above, if the ratio of the stop clock state to the system timer is greater, the effect of reducing power dissipation will be greater. The above-mentioned (1) and (2), however, show that if the CPU throttling operation is performed by background art, the ratio of the stop clock state to the system timer will become smaller. Therefore, the background art has the problem that if the system in the idle state performs the CPU throttling operation, power dissipation will increase to the contrary.
The present invention has been made in order to solve the above-mentioned problem.
An object of the present invention is to provide a power management apparatus and a power management method in a computer system which are capab
Kawahara Kohji
Maruichi Tomoki
Miyamura Tsuyoshi
Sugawara Takashi
Cao Chun
Dougherty Anne V.
Lee Thomas
Percello Louis
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