Computer memory write protection circuit

Details Computer memory write protection circuit Computer memory write protection circuit

1990-02-12

1991-05-14

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Signals

365228, G11C 700

Patent

active

050162195

ABSTRACT:
A write protection circuit for the Real Time Clock (RTC) Random Access Memory (RAM) of a computer prevents the writing of data into the RTC RAM in the event of a power supply interruption, including write operations which are in progress during removal or interruption of the power supply. This is accomplished by latching both the address and the data in a buffer instead of connecting the respective address and data buses directly to the destination address location in the RTC RAM. In addition, once the data is buffered, the actual write signal to the internal destination of the RTC RAM is delayed until termination of the write strobe pulse. Once the write strobe pulse is terminated; and, additionally, if no power supply interruption has occurred during the latching of the data, an asynchronous monostable multivibrator generates a delayed write strobe which is used to transfer the latched data to the RTC RAM.

REFERENCES:
patent: 4327410 (1982-04-01), Patel et al.
patent: 4580240 (1986-04-01), Sibigtroth

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