Computer memory with status cell

Details Computer memory with status cell Computer memory with status cell

1990-09-26

1992-08-04

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Testing

365154, G11C 1300

Patent

active

051365448

ABSTRACT:
A memory device is described. The memory device includes a memory array. A configuration cell configures the memory device with respect to memory device operation. The configuration cell is coupled to various internal circuits of the memory device. The configuration cell is initially in a first state and can selectably be placed into a second state. Once the configuration cell is placed into the second state, the configuration cell is impeded from returning to the first state. A status cell is initially in a third state and can selectably be placed into a fourth state. Once the status cell is placed into the fourth state, the status cell is impeded from returning to the third state. A control circuit is coupled between the status cell and the configuration cell. If the memory device is in a standby mode, and the status cell is in the third state, then the control circuit turns off the current of the configuration cell. A method of testing a memory device is also described.

REFERENCES:
patent: 5086413 (1992-02-01), Tsube et al.

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