Computer memory with anti-virus and anti-overwrite...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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Details

C711S154000, C711S164000

Reexamination Certificate

active

06330648

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The invention is related to the protection of computer mass memories such as magnetic hard disk drives, optical disk drives and the like, and in particular to apparatus for protecting key sectors of such memories from accidental or unauthorized overwriting.
2. Background Art
A computer is vulnerable to accidental or unauthorized overwriting or erasure of portions of its mass memory containing key programs such as the operating system, for example, or containing important archival storage such as accounting information, for example. Unauthorized overwriting can occur when a computer virus somehow enters the computer in the form of a clever program that gets stored in the mass memory and which contains instructions causing the computer to overwrite such key portions of its mass memory. If, for example, a portion of the mass memory containing the operating system is overwritten because of such a virus, the computer does not function the next time it is powered up. If portions of the mass memory containing application programs are overwritten, such programs will not run properly. Accidental or unauthorized overwriting of the mass memory can also occur by accidental formatting of the hard drive or by erasing sector zero of the mass memory including the file allocation table.
An object of the present invention is to provide a computer which is impervious to unauthorized (intentional) or accidental overwriting of key sectors of its mass memory. A related object of the invention is that the computer be impervious to such unauthorized or accidental overwriting of key mass memory sectors even in the presence of an active computer virus in the mass memory.
SUMMARY OF THE DISCLOSURE
The invention is embodied in a computer including a mass memory and a memory protector responsive to a list of key mass memory locations containing information to be protected, the memory protector including (a) a write protection circuit—operating independently of the computer—which prevents any write requests specifying the mass memory locations contained in the list from being carried out, and (b) a user-controlled protect enable switch for enabling and temporarily disabling the write protection circuit, thus allowing special or temporary access to the protected mass memory locations. The write protection circuit may be implemented as a programmed microprocessor with its program stored in a non-volatile read-only memory, or as a dedicated hard-wired logic circuit, such as a field programmable gate array. The list of key mass memory locations may be stored in a non-volatile memory accessed by the write protection circuit. More conveniently, the list is contained in a protected mass memory location (i.e., a mass memory location specified on the list itself), the list being downloaded to the write protection circuit as required. For example, it may be downloaded at system power-up, or each time the user-controlled protect enable switch is moved to its enable position or each time the media is changed (for example, if the mass memory is a removable media disk drive).
However, in the preferred embodiment, no list of protected mass memory locations is required. Instead, each protected mass memory location (e.g., a particular sector on a disk drive) has a particular bit (hereinafter referred to as a “sector bit”) which is always protected by the protection circuit. The protection circuit always senses the value of the protected sector bit before permitting any writing to that sector. If the sector bit is of a certain “flag” value (e.g., binary
1
), then the protection circuit
160
prevents any writing to that sector. Otherwise, if the sector bit is not set to the “flag” value (e.g., if the sector bit is binary
0
), then the protection circuit permits that sector to be written to. The sector bit may only be changed if the protection circuit has been disabled by the user exercising the switch. An advantage of this embodiment is that a complete list of addresses of protected mass memory locations need not be maintained and periodically accessed or downloaded for the protection circuit.
The designation or list of protected mass memory locations may be modified only by first toggling the protect enable switch. In the embodiments in which a list of all protected mass memory locations is stored in a known protected memory location (either on a PROM chip or on the mass memory itself), toggling of the switch at least temporarily disables the protect circuit to allow writing to the mass memory location (or PROM location) containing the list. Since the protect enable switch is controlled by an external entity (either the user or a remote controller, device or computer), it is not susceptible to tampering by a computer virus which has entered the mass memory of the host computer. Since the write protection circuit is independent of the host computer, it does not respond to and is not changed by instructions stored in the computer's mass memory, and therefore is not susceptible to tampering by a computer virus stored in the mass memory.
In a first embodiment, the write protection circuit and the manual protect enable switch are part of the mass memory (e.g., the hard drive) itself. In a second embodiment, the write protection circuit and the manual protect enable switch are at a remote location such as an interface card normally installed between the computer and the mass memory or in a separate card in-line with the interface card. In the second embodiment, the write protection circuit responds to a request to write to a protected mass memory location by causing an illegal command to be sent to the mass memory, causing the mass memory to abort the write operation and issue an error signal back to the computer. In either the first or second embodiment, the list can be stored either in a non-volatile memory accessed by the write protection circuit or in a protected location of the computer's mass memory, as stated above. The first embodiment is suited for using a protected sector bit in each sector to label the sector as “protected” or “unprotected”.
If the list of protected mass memory locations is stored in a non-volatile memory accessed by the write protection circuit, the non-volatile memory optionally may be programmable through the host computer for the sake of convenience. However, in this case overwriting of the non-volatile memory containing the list of protected mass memory locations is preferably prevented whenever the protect enable manual switch is in its enable position. In this way the non-volatile memory enjoys the same status as the protected sectors of the host computer's mass memory. In another embodiment, the non-volatile memory storing the list of protected mass memory locations is not accessible to the host computer.
There are several advantages to storing the list of protected mass memory locations in the mass memory itself or always protecting a sector bit in each sector designating that sector as protected or unprotected. One is that minimal reconfiguration of existing mass memory systems is required to carry out the invention. Another is that memories with removable media can have different patterns of protected memory locations for different removable disks up to any number of removable disks for a given disk drive.
Another feature of the invention is a time-out feature in which the disable mode of the manual protect enable switch is effective for a limited time only, so that inadvertent or intentional tampering with the switch is not possible. Such a feature is built into the write protection circuit or the program it carries out.


REFERENCES:
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patent: 4701846 (1987-10-01), Ikeda et al.
patent: 5022077 (1991-06-01), Bealkowski et al.
patent: 5027317 (1991-06-01), Pepera et al.
patent: 5067077 (1991-11-01), Wakimoto et al.
patent: 5155829 (1992-10-01), Koo
patent: 5421006 (1995-05-01), Jablon et al.
patent: 5564036 (1996-10-01), Sugai
patent: 5586301 (1996-12-01), Fisherman et al.
patent: 5657475

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