Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1993-10-05
1999-09-14
Robertson, David L.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711123, 711125, 711126, G06F 1300
Patent
active
059537400
ABSTRACT:
A computer memory system connectable to a processor and having programmable operational characteristics based on characteristics of the processor. The memory system includes several caches and a main memory connected to a bus. One cache can be programmed to store only code data. Another cache can be programmed to buffer data writes to the main memory only from the processor. The main memory supports fast page mode and can be programmed to selectively reopen either code or non-code data pages.
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Computer Design, Jul. 1, 1990, pp. 78-90; Wilson: "Will the search for the ideal memory architecture ever end?".
Arnold Forrest O.
Ellis Jackson L.
King Edward C.
Moussavi Robert B.
Vermeer Fulps V.
Foote Douglas S.
Gates George H.
NCR Corporation
Robertson David L.
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