Electrical computers and digital processing systems: processing – Processing control – Processing control for data transfer
Patent
1995-12-15
1999-08-10
Maung, Zarni
Electrical computers and digital processing systems: processing
Processing control
Processing control for data transfer
345501, G06F 9305
Patent
active
059352400
ABSTRACT:
A method for transferring packed data including the steps of first receiving an instruction from a set of instructions for transferring packed data between an extended register file and either an integer register file or a memory. In one embodiment, the extended register file includes eight registers, with each of the extended register storing up to sixty-four data bits. The integer register file also includes eight registers. The instruction includes an opcode that specifies a direction of the transfer with respect to the extended register file. The instructions are encoded in an instruction format having up to three bits addressing a destination operand and up to three bits addressing a source operand. The instruction is then translated to determine a direction of the transfer, a size of said packed data to be transferred, the address of the destination operand, and the address of the source operand. The instruction decoded by a decoder unit previously designed to decode the instruction format used to encode the set of instructions. In response to receiving the instruction, the packed data is transferred between the extended register file and either the integer register file or the memory, pursuant to the specifications of the translated instruction.
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Dulong Carole
Eitan Benny
Glew Andrew F.
Kowashi Eiichi
Mennemeier Larry M.
Intel Corporation
Maung Zarni
Winder Patrice L.
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