Computer implemented method for designing a semiconductor...

Details Computer implemented method for designing a semiconductor... Computer implemented method for designing a semiconductor...

2008-04-01

2008-04-01

Kik, Phallaka (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C326S101000, C323S364000, C438S618000, C438S622000

Reexamination Certificate

active

11320643

ABSTRACT:
A computer implemented method for designing a semiconductor integrated circuit includes placing dummy pattern on a second interconnection layer positioned just above the first power line based on a placement result of the first power line, the dummy pattern having a long axis parallel with a direction of the first power line; and electrically connecting the dummy pattern to the first power line, based on placement results of the first power line and the dummy pattern.

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Automated English Translation of Japanese Patent Publication No. JP-10041398 A, translated on Sep. 12,2007, pp. 1-9.

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