Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-03-08
2009-10-27
Chase, Shelly A (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reexamination Certificate
active
07610541
ABSTRACT:
A computer compressed memory system for storing and retrieving data in a processing system, includes a memory including at least one memory device for storing at least one of uncompressed data and compressed data, a compressor for encoding data blocks into smaller compressed data blocks for storage in the memory, a decompressor for reconstituting encoded data into original uncompressed data blocks, a memory controller for generating, receiving and responding to memory access requests from processing and input/output units and responsively controlling access to the memory from the compressor and the decompressor for storing and retrieving data, and a hardware priority filter associated with the memory controller for selecting specific memory access requests according to attributes and access type within prescribed rates and under specific conditions.
REFERENCES:
patent: 6092171 (2000-07-01), Relph
patent: 7047382 (2006-05-01), Geiger et al.
patent: 2007/0157001 (2007-07-01), Ritzau
Franaszek Peter A.
Tremaine Robert Brett
Chase Shelly A
International Business Machines - Corporation
Nelson, Es E. Dwayne
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