Computer chipset for accessing a conventional read only...

Details Computer chipset for accessing a conventional read only... Computer chipset for accessing a conventional read only...

1999-03-11

2001-09-04

Yoo, Do Hyun (Department: 2187)

Electrical computers and digital processing systems: support

Digital data processing system initialization or configuration

Loading initialization program

C711S102000, C711S165000

Reexamination Certificate

active

06286097

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application Serial No. 87112950, and No. 87112951 filed Aug. 6, 1998, the full disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention generally relates to a computer chipset, and more particularly to a chipset for accessing a read only memory (ROM).
2. Description of Related Art
Computers are getting more and more popular, while their size and price are significantly reduced, thanks to the advancement of semiconductor technologies.
FIG. 1
is a block diagram showing an architecture of a conventional computer system
100
, in which a main processor
110
, a chipset
120
, a main memory
130
, a peripheral device
140
, and a read only memory (ROM)
150
for storing booting programs for the computer system
100
, are depicted. Note that the main processor
110
includes a central processing unit (CPU) and CPU-related circuits. The chipset
120
is used to integrate control circuits in the computer system
100
. The main processor
110
accesses the main memory
130
and communicates with the peripheral device
140
with the aid of the chipset
120
within the computer system
100
. The main memory
130
includes memories and their related control circuits. The main memory
130
, typically dynamic random access memory (DRAM) because of its higher capacity and lower price, is used to store programs and data used by the main processor
110
. The peripheral device
140
includes various peripheral devices which can be connected to the computer system
100
, such as hard disk drives (HDD), floppy disk drives (FDD), devices connected to a RS232 interface, and printers, etc.
The ROM
150
not only stores the booting programs, but also programs of the basic input output systems (BIOS) for the computer system
100
. When the computer system
100
is turned ON or reset, the main processor
110
will access the ROM
150
to boot the computer system
100
. Over the past few years, the accessing speed of DRAMs has been significantly improved thanks to the advancement of semiconductor technologies. The enhancement of ROMs, however, is not so impressive. Therefore, there is a gap in accessing speed between the DRAMs and ROMs.
The BIOS programs stored in the ROM
150
within the computer system
100
need to be called frequently. Unfortunately, performance of the computer system
100
is generally deteriorated because of the low accessing speed of the ROM
150
. Therefore, it has become a common practice to move the programs stored in the ROM
150
to the main memory
130
once the computer system
100
is booted. The programs in the main memory
130
, instead of the ROM
150
, will be called to increase the operating efficiency as long as the computer system
100
is in operation.
As shown in
FIG. 1
, where the computer system
100
accesses contents of the ROM
150
through an industrial standard adapter (ISA) interface
125
, which is integrated within the chipset
120
. In the early stage, personal computers used to access various peripheral devices only through the ISA interface
125
. With more complete specifications for computer interface developed, such as a peripheral component interconnect (PCI), the ISA interface
125
has gradually become obsolete. In another aspect, although a chipset can be designed to provide more functions, it can not, however, provide enough pins to perform these functions due to the size constraint of the chipset itself. Especially, the less functional ISA interface occupies excessive pins from the chipset, which is against the trend for demanding a smaller size for an electronic component. Therefore, the computer industry is now considering to totally abandon the ISA interface. Instead, a new interface of low pin count (LPC), which only uses 8 pins, is proposed to replace the ISA interface. Although the LPC interface takes fewer pins from the chipset, it does cause a problem. That is, the ROMs for storing the BIOS programs to boot the computer system need to be redesigned accordingly if the LPC interface is used.
FIG. 2
is a block diagram showing an architecture of a conventional computer system using a LPC interface in a chipset to access a ROM. As shown in
FIG. 2
, when a computer system
200
is turned on, booting programs in a ROM
250
will be accessed and executed in a main processor
210
. The contents of the ROM
250
will then be moved to a main memory
230
through a LPC interface
225
within a chipset
220
. Therefore, the LPC interface
225
within the chipset
220
possesses the same functions as those of the ISA interface in FIG.
1
.
Although the LPC interface
225
occupies less peripheral pins, it can not, however, connect to conventional ROMs, which are widely used so far. An interface circuit for ROMs needs to be designed to connect to the LPC interface
225
within the chipset
220
. Unfortunately, ROMs with a LPC interface are not available now. If there is any, the cost at the initial stage will be very high due to production scale or technological problems.
As a summary, the conventional architecture for accessing a ROM in a computer system has the following disadvantages:
1. An ISA interface within a chipset is required to access the booting programs stored in a conventional ROM for a computer system. The ISA interface, however, occupies excessive peripheral pins from the chipset, preventing the chipset from providing more functions for the computer system.
2. If a LPC interface built within a chipset is used to access a ROM, a LPC interface circuit for the ROM needs to be designed, which are not available so far. Even if the LPC interface for ROMs is available, the production cost of the “new” ROMs will be higher than that of the conventional ROMs, so that the products produced will not be very competitive in the market.
SUMMARY OF THE INVENTION
It is therefore an objective of the present invention to provide a chipset for accessing a conventional ROM by using pehipheral circuits, without using the conventional ISA interface. The number of peripheral pins for accessing the conventional ROM within the chipset is significantly reduced so that more functions can be provided by the chipset. Furthermore, more costly ROMs with LPC interface need not be used so that the production cost can be reduced to increase product competitiveness.
It is another objective of the present invention to provide a chip set for accessing a conventional ROM by peripheral circuits, in which signal lines of the LPC interface circuit and other interface circuits within the chipset and signal lines of the ROM share the same peripheral pins to access the ROM, so that additional peripheral pins of the chipset to access the ROM are not required.
In accordance with the foregoing and other objectives of the present invention, a computer chipset having reduced peripheral pins for accessing a conventional ROM in a computer system is provided. The computer system comprises a main processor, a ROM, a peripheral control circuit, a booting control circuit, a switching circuit, and a main control circuit. The peripheral control circuit, including a low pin count (LPC) interface circuit, is used to control various peripheral devices. The booting control circuit is used to generate a booting enabling signal to control the access to a ROM. The switching circuit has a first input-output port, a second input-output port, and a third input-output port, in which the first input-output port is coupled to the peripheral control circuit, the second input-output port is coupled to the booting control circuit, and the third input-output port is coupled to a peripheral device and the ROM. The switching circuit is controlled by the booting enabling signal so that either the first input-output port or the second input-output port is connected to the third input-output port. That is, the second input-output port is connected to the third input-output port when the booting enabling signal is activated, and first input-out

Affiliated with

Also associated with

Rating

Computer chipset for accessing a conventional read only... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Computer chipset for accessing a conventional read only..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Computer chipset for accessing a conventional read only... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2525992