Computer automated method for optimizing an integrated...

Details Computer automated method for optimizing an integrated... Computer automated method for optimizing an integrated...

2005-10-31

2008-11-11

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000, C430S005000, C430S030000

Reexamination Certificate

active

07451429

ABSTRACT:
A computer automated method for designing an integrated circuit includes placing a plurality of marks on each of contours of a plurality of patterns allocated in a chip area; dividing the marks into a plurality of groups so that the adjacent marks are merged in a same group; determining one of the groups as a candidate hot spot based on a total number of marks included in each of the groups; and modifying the corresponding pattern in the candidate hot spot.

REFERENCES:
patent: 6631307 (2003-10-01), Tzu et al.
patent: 6668367 (2003-12-01), Cobb et al.
patent: 7194704 (2007-03-01), Kotani et al.
patent: 2003-162041 (2003-06-01), None
U.S. Appl. No. 10/304,895, A. Ikeuchi.

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