Computational structure having multiple stages wherein each stag

Details Computational structure having multiple stages wherein each stag Computational structure having multiple stages wherein each stag

1998-12-10

2000-06-20

An, Meng-Ai T.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

708505, 708650, 712200, 712221, G06F 752

Patent

active

060789417

ABSTRACT:
A modular computational structure includes a pipeline having first and second adder stages. Each adder stage includes a pair of adders which operate in parallel, and outputs ports of the first adder stage are coupled to input ports of the second adder stage. Rounding logic and an accumulator are included in the second stage. By varying the inputs to the first and second stages a variety of complex arithmetic functions suitable for video encoding can be implemented. Examples of the operations include completion of multiply and multiply-and-accumulate operations, averages of two values, averages of four values, and merged difference and absolute value calculation.

REFERENCES:
patent: 4887232 (1989-12-01), Wolrich et al.
patent: 5072419 (1991-12-01), Zyner
patent: 5283755 (1994-02-01), Bechade
patent: 5457646 (1995-10-01), Jang et al.
patent: 5771391 (1998-06-01), Lloyd et al.

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