Computation of die-per-wafer considering production...

Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing

Reexamination Certificate

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C700S097000, C700S171000, C716S030000, C716S030000

Reexamination Certificate

active

06529790

ABSTRACT:

TECHNICAL FIELD
The present invention relates to integrated circuit design and fabrication. More specifically, the present invention pertains to a method and system for calculating the number of integrated circuit dies per wafer and the stepper shot count for different wafer sizes and production methods.
BACKGROUND ART
Integrated circuit dies are fabricated en masse on silicon wafers using well-known techniques such as photolithography. Using these techniques, a pattern that defines the size and shape of the components and interconnects within a given layer of the die is applied to the wafer. The pattern applied to the wafer is laid out in an array, or matrix, of reticle images. A wafer stepper holds the pattern over a wafer and projects the pattern image of the reticle onto the wafer. The area on the wafer upon which the image is projected is defined as a stepper shot. A multitude of interconnecting layers, one formed on top of another, are essentially built up on the integrated circuit dies using several passes through the stepper.
The gross number of dies that can be produced from a single wafer is, as would be expected, dependent on the size and shape of the individual dies. The number of stepper shots is dependent on the number of die images that can be placed in the printable field of the reticle, which in turn is dependent on the size and shape of the individual dies. Therefore, the number of stepper shots is also dependent on the size and shape of the individual dies.
It may not always be desirable to maximize the number of dies produced per wafer. If the fabrication facility wafer steppers are not being used to capacity, then it generally is appropriate to adjust die size and shape to maximize the gross number of dies per wafer. On the other hand, if the fabrication facility is capacity limited by its wafer steppers, it may be more important to minimize the stepper shot count. When the fabrication facility is fully loaded, it may be beneficial to accept slightly fewer dies per wafer if the number of stepper shots is reduced as a result, thereby allowing more wafers to be processed during a given timeframe and consequently producing a greater number of total dies.
However, the prior art is problematic because decisions may be made in the design phase without fully considering the effect on the fabrication phase. In the prior art, the design phase and the fabrication phase of the integrated circuit die production process may be separate and independent from each other. In the design phase, the integrated circuit die must be designed to have a surface area large enough to accommodate the microcircuitry that will be included in the integrated circuit. The designer will typically choose dimensions that provide a size and shape that provide the required surface area, but may pay lesser regard to selecting dimensions that, along with providing the required surface area, also maximize the gross number of dies per wafer.
In some instances in the prior art, an effort may be made to coordinate the design phase with the fabrication phase. As might be expected, this coordination may not always take place. However, even in those cases where a more formal process is used to coordinate design and fabrication, the prior art is still problematic because the dimensions of the die are often chosen with the goal of maximizing the number of dies per wafer, without considering the number of stepper shots needed to produce the dies. As described above, it is not always desirable to maximize the number of dies produced per wafer.
In order to facilitate coordination between the design and fabrication processes, one solution is a method and system whereby a designer inputs proposed dimensions for a die and receives as output the results of a calculation of number of dies per wafer and stepper shot count. The designer can iterate using different dimensions until desirable values of the number of dies per wafer and stepper shot count are obtained. Additional information regarding this solution is provided in the copending patent application filed concurrently herewith, assigned to the assignee of the present invention, entitled “Method And System for Varying Die Shape to Increase Wafer Productivity,” by Wesley R. Erck, Michael R. Magee, and Michael D. Beer, with Ser. No. 09/473,384, hereby incorporated by reference.
In one implementation of the solution described by this reference, lookup tables are used to compute the die count and the stepper shot count. These lookup tables are a function of the different parameters that can affect the number of die per wafer and the stepper shot count, such as the wafer size and production method (e.g., ceramic package, plastic package, narrow scribe, stepper type, and the like). Thus, a multiplicity of different lookup tables may be needed in order to account for the different parameters that can affect the results. For example, a die count lookup table and a stepper shot count lookup table are needed for each combination of the different parameters that can affect the results.
Each of the lookup tables can take a relatively long period of time to generate, perhaps on the order of a week. Consequently, to generate the lookup tables, the processing resources of a computer system may be consumed for an extended period of time. In addition, if it is necessary to change a lookup table or create a new one, it may not be ready when needed.
Furthermore, when a new parameter affecting the number of die per wafer or the stepper shot count is introduced, or when an existing parameter is changed to a new value, then a new lookup table needs to be generated, further consuming time, computer processing resources, and file space. For example, if a new production method is implemented, new lookup tables need to be generated for each wafer size, etc.
Accordingly, what is needed is a method and/or system that can facilitate coordination between the design and fabrication phases of integrated circuit die production in order to maximize the rate of die production based on either or both the number of dies per wafer and the number of stepper shots, depending on the desired utilization of the fabrication facility. What is also needed is a method and/or system that satisfies the above need and also can reduce the impact on computational resources, in particular with regard to the resources needed by lookup tables. Furthermore, what is needed is a method and/or system that satisfies the above needs and provides the flexibility to support changes in production parameters. The present invention provides a novel solution to the above needs.
These and other objects and advantages of the present invention will become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various drawing figures.
DISCLOSURE OF THE INVENTION
The present invention provides a method and system thereof that can facilitate coordination between the design and fabrication phases of integrated circuit die production in order to maximize the rate of die production based on either or both the number of dies per wafer and the number of stepper shots, depending on the desired utilization of the fabrication facility. The present invention also provides a method and system thereof that reduce the impact on computational resources. Furthermore, the present invention also provides a method and system thereof that provide the flexibility to support changes in production parameters.
The present embodiment of the present invention pertains to a method and system thereof for computing number of dies per wafer and the corresponding number of stepper shots. Dimensions for a die and the size of the wafer are received. The dimensions comprise a die element size that is a function of a scribe lane width, a guard ring width, an input/output pad area, and a length and a width of the die. A die count lookup table is selected for the specified wafer size and used to determine the die count corresponding to the die element size. In

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