Compression and decompression of configuration data using...

Details Compression and decompression of configuration data using... Compression and decompression of configuration data using...

2011-02-24

2011-11-15

Ismail, Shawki S (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C341S055000, C716S117000

Reexamination Certificate

active

08058898

ABSTRACT:
In one embodiment, a method of converting an uncompressed bitstream into a compressed bitstream for a programmable logic device (PLD) is disclosed. The method includes embedding a first data frame from the uncompressed bitstream into the compressed bitstream, wherein the first data frame comprises a first data set; embedding a first instruction into the compressed bitstream to load the first data frame into a first row of configuration memory of the PLD at an address associated with the first data frame; identifying a second data frame in the uncompressed bitstream, wherein the second data frame comprises the first data set; and embedding a second instruction into the compressed bitstream to load the first data frame into a second row of the configuration memory at an address associated with the second data frame.

REFERENCES:
patent: 6493862 (2002-12-01), Young et al.
patent: 6772230 (2004-08-01), Chen et al.
patent: 7902865 (2011-03-01), Cheng et al.
patent: 2010/0223237 (2010-09-01), Mishra et al.

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