Compound semiconductor field effect transistor having an amorpho

Details Compound semiconductor field effect transistor having an amorpho Compound semiconductor field effect transistor having an amorpho

1998-01-30

1999-07-06

Abraham, Fetsum

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257288, 257289, 257290, 257368, 257411, H01L 2978

Patent

active

059201053

ABSTRACT:
An undoped GaAs layer and a GaAs active layer are formed on a GaAs semiconductor substrate in that order, and a surface of the GaAs active layer is inactivated. Thereafter, a wafer composed of the GaAs semiconductor substrate, the undoped GaAs layer and the GaAs active layer is annealed at temperatures ranging from 570 to 580.degree. C. in a molecular beam epitaxy apparatus. Thereafter, the wafer is maintained at temperatures ranging from 350 to 500.degree. C., and an insulating layer made of amorphous GaAs is formed on the GaAs active layer while using tertiary-butyl-gallium-sulfide-cubane "((t-Bu)GaS).sub.4 " as a source of the insulating layer. Thereafter, the insulating layer is patterned according to a photo-lithography method to form a gate insulating layer on the GaAs active layer. Thereafter, a source electrode and a drain electrode are formed on both sides of the gate insulating layer to arrange the source and drain electrodes separated from each other on the GaAs active layer, and a gate electrode is formed on the gate insulating layer.

REFERENCES:
patent: 5760462 (1998-06-01), Barron et al.

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