Composite silicon-metal nitride barrier to prevent formation...

Details Composite silicon-metal nitride barrier to prevent formation... Composite silicon-metal nitride barrier to prevent formation...

2000-06-05

2002-04-16

Chaudhari, Chandra (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S640000, C438S687000

Reexamination Certificate

active

06372636

ABSTRACT:

BACKGROUND OF THE INVENTION
(1). Field of the Invention
The present invention relates to the manufacture of semiconductor devices in general, and in particular, to a method of using composite silicon-metal nitride as a barrier to prevent formation of metal fluorides in copper damascene interconnects.
(2). Description of the Related Art
Copper is a preferred metal for use as an interconnect in semiconductor devices. This is because, as is well known in the art, copper has lower resistivity than the commonly used aluminum and has better electromigration properties. At the same time, the advent of copper interconnects has motivated the use of insulating materials with low dielectric constant (k) in order to further improve the over-all device performance. Some of the low-k candidates are fluorinated materials, such as amorphous fluorinated carbon (&agr;-C:F), PTFE, fluorinated SiO
2
and fluorinated polyimide. However, defluoriniation occurs with these materials, which then reacts with barrier materials and causes delamination. Barrier materials are used because, copper unfortunately suffers from high diffusivity in these insulating materials. For instance, copper tends to diffuse into polyimide during high temperature processing of the polyimide. This causes severe corrosion of the copper and the polyimide due to the copper combining with oxygen in the polyimide. The corrosion may result in loss of adhesion, delamination, voids, and ultimately a catastrophic failure of the component. A copper diffusion barrier is therefore often required. This invention discloses a method for preventing the fluorine contacting the barrier for the organic low-k and the fluorinated inorganic materials. This is accomplished by forming a thick “trapping” layer of amorphous silicon, followed by metal nitride, as will be described more in detail later in the embodiments of the present invention. The metal nitride then reacts with the silicon to form the ternary metal silicon nitride which has excellent copper diffusion barrier property and adhesion toward copper.
Copper dual damascene process is a well-known technique for forming interconnections in semiconductor devices. It is especially well suited for Ultra Large Scale Integrated (ULSI) circuit technology where more and more devices are being packed into the same or smaller areas in a semiconductor substrate. As the feature sizes get smaller, the smaller geometries result in higher electrical resistances, which in turn degrade circuit performance. As will be described more fully later, damascene process provides a more exact dimensional control over small geometries, while copper, as the metallization material, provides better electrical characteristics.
The term ‘damascene’ is derived from a form of inlaid metal jewelry first seen in the city of Damascus. In the context of integrated circuits it implies a patterned layer imbedded on and in another layer such that the top surfaces of the two layers are coplanar. Thus, in semiconductor manufacturing, grooves and holes in appropriate locations in the grooves are formed in an insulating material by etching, which are then filled with metal. Metal in grooves form the horizontal metal line interconnects while the metal in the underlying holes form the vertical connections to the layers of metal interconnects formed in the previous damascene structure.
Thus, in a single damascene semiconductor manufacturing process, incisions, or grooves, are formed in an insulating layer and filled with metal to form conductive lines. Dual damascene takes the process one step further in that, in addition to forming the grooves of a single damascene, hole openings are also formed at appropriate places in the groove further into the insulating layer. The resulting composite structure of grooves and holes are filled with metal. The process is repeated as many times as required to form the multi-level interconnections between metal lines and the holes formed therebetween.
In one approach for a dual damascene process shown in
FIG. 1
a
, two insulating layers (
120
) and (
130
) are formed on a substrate (
100
) with an intervening etch-stop layer (
125
). Substrate (
100
) is provided with metal layer (
110
) and a barrier layer or passivation layer (
115
). Metal layer can be the commonly used aluminum or copper, while the barrier layer can be an oxide layer or nitride layer. A desired trench or groove pattern (
150
) is first etched into the upper insulating material (
130
) using conventional photolithographic methods and photoresist (
140
). The etching stops on etch-stop layer (
125
). Next, a second photoresist layer (
160
) is formed over the substrate, thus filling partially the groove opening (
150
), and patterned with hole opening (
170
), as shown in
FIG. 1
b
. The hole pattern is then etched into the lower insulating layer (
120
) as shown in
FIG. 1
c
and photoresist removed, thus forming the dual damascene structure shown in
FIG. 1
f.
Or, the order in which the groove and the hole are formed can be reversed. Thus, the upper insulating layer (
130
) is first etched, or patterned, with hole (
170
), as shown in
FIG. 1
d
. The hole pattern is also formed into etch-stop layer (
125
). Then, the upper layer is etched to form groove (
150
) while at the same time the etching transfers the hole pattern in the etch-stop layer into lower insulation layer (
120
), as shown in
FIG. 1
e
. It will be noted that the etch-stop layer stops the etching of the groove into the lower insulation layer. After the completion of the thusly formed dual damascene structure, both the hole opening and groove opening are filled with metal (
180
), and any excess material on the surface of the substrate is removed by chemical mechanical polishing, as seen in
FIG. 1
f.
Prior art teaches several different methods of forming damascene structures with metal barrier layers. In U.S. Pat. No. 6,017,817, Chung, et al., disclose a method of fabricating a dual damascene structure. A low k dielectric layer and a cap layer are successively formed on a substrate having an active region. A first photoresist layer is formed on the cap layer and the cap layer is then patterned to expose a portion of the low k dielectric layer. The first photoresist layer and a portion of the low k dielectric layer ate simultaneously removed to form a wiring line opening. A second photoresist layer is formed on the cap layer to cover a portion of the wiring line opening. When the step of removing the second photoresist layer is performed, a via hole is formed to expose the active region by simultaneously removing the exposed low k dielectric layer. The via hole and the wiring line opening are filled with a metal layer to form a wiring line and a via.
A self-aligned via dual damascene is shown in U.S. Pat. No. 5,795,823 by Avanzino, et al. A mask pattern of trenches of conductive lines containing laterally enlarged areas where the via openings are to formed in the insulating material are first formed. After the conductive line openings with laterally enlarged areas are created, the openings are filled with a conformal material whose etch selectivity is substantially less than the etch selectivity of the insulating material to the enchant for etching the insulating material and whose etch selectivity is substantially greater than the insulating material to its enchant. The conformal material is anisotropically etched to form sidewalls in the enlarged area and remove the material between the sidewalls but leave material remaining in the parts of the conductive lines openings. The sidewalls serve as self aligned mask for etching via openings. The conformal material is either a conductive material which is left in place after the via openings are formed or an insulating material which is removed. In the former, the partially filled conductive line openings arc filled with additional conductive material along with the via, which is either the same or different conductive material. In the latter, the conductive line openings and vias are filled with the same conductive

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