Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Reexamination Certificate
2002-01-31
2002-11-12
Lam, Cathy (Department: 1775)
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
C427S097100
Reexamination Certificate
active
06479093
ABSTRACT:
TECHNICAL FIELD
The present invention relates to laminate circuit structures, and more particularly to composite laminate circuit structures from a plurality of modularized circuitized plane subassemblies having a joining layer between each adjacent pair of subassemblies and being bonded together. The present invention also relates to a method for fabricating the laminate circuit structures. The present invention provides for planar, fine line external circuit flatlines and does not require plated through holes or copper plating of the composite structure.
BACKGROUND OF INVENTION
A conventional technique of forming a laminate circuit board structures includes forming layers of dielectric material and electrically conducting material to provide multiple layers of circuits and voltage planes. Voltage planes can be either ground plane or power planes, and are sometimes collectively referred to as power planes. In one technique of forming such structure, layers of dielectric material and conducting material successively applied, i.e. the dielectric material is applied and then voltage planes are supplied thereon and if necessary through holes formed by the drilling or etching of through holes or blind vias. This technique relies on each successive step adding additional structure and the circuitry layers are formed individually; i.e., in each step in forming the plane having circuit traces on formed power planes. This requires precision drilling to form the plated through holes all of which is time consuming, especially where there is a large number of drilled holes required to form plated through holes.
More recently, techniques have been described that provide a relatively inexpensive photolithographic technique of forming a composite laminate structure from individual discrete laminate structures into a composite laminate structure.
Along these lines see U.S. Pat. No. 6,204,453 entitled “Two Signal One Power Plane Circuit Board,” U.S. Pat. No. 6,201,194 entitled “Multi-Layer Organic Chip Carrier Package” and U.S. Pat. No. 6,175,087 entitled “Composite Laminate Circuit and Method of Forming the Same,” entire disclosures of which are incorporated herein by reference. Although the structures and methods of these inventions provide significant advances and advantages over current printed wire board (PWB) fabrication methods, there still exists a need for further refinement. Therefore continuing efforts are underway in attempting to provide for even greater advantages.
SUMMARY OF INVENTION
The present invention makes possible laminate circuit structures being more robust and less costly. The present invention provides for reduced cost since copper plating of the composite structure is no longer required and plated through holes are not needed. Moreover, alignment of the various sub-elements is not as critical since the need to maintain a minimum through hole diameter to get copper plating solution through no longer exists.
More particularly, the laminate circuit structure assembly of the present invention composes at least two modularized circuitized plane subassemblies wherein each of the subassemblies comprise at least two planes having circuit traces disposed about an internal circuitized plane. The at least two planes each have an external surface and an internal surface. Dielectric material is located between the circuit traces and circuitized plane. At least one via is disposed within each subassembly for providing electrical communication between the planes having circuit traces and electrical connection to another of the subassemblies. The vias are filled with a bondable electrically conductive material. Dielectric is also present on each external surface of each plane and having a via filled with a bondable electrically conductive material. The bondable electrically conductive material in the dielectric is aligned with and contacts the bondable electrically conductive material in the vias in the planes having circuit traces for providing electrical connection to another of the subassemblies.
A joining layer is located between each of the subassemblies wherein the joining layer comprises dielectric layers disposed about an internal electrically conductive layer wherein the electrically conductive layer has a via and the dielectric layers each have a via of smaller diameter than the via in the electrically conductive layer and aligned with the via in the electrically conductive layer. The vias in the dielectric layers and electrically conductive layers are filled with a bondable electrically conductive material for providing electrical contact between the subassemblies.
The subassemblies and joining layer are bonded together with a cured dielectric from a bondable dielectric and are interconnected with a conductive member.
The present invention also relates to a method for fabricating a laminate circuit structure assembly. The method comprises providing at least two modularized circuitized plane subassemblies wherein each of the subassemblies comprise at least two planes having circuit traces disposed about an internal circuitized plane. The planes having circuit traces each have an external surface and an internal surface. Dielectric material is located between the planes. At least one via is disposed within each subassembly for providing electrical communication between the planes having circuit traces and electrical connection to another of the subassemblies. The vias are filled with bondable electrically conductive material. Dielectric is also provided on each external surface of each plane having circuit traces and having a via filled with a bondable electrically conductive material. The bondable electrically conductive material in the dielectric is aligned with and contacts the bondable electrically conductive material in the via in the planes having circuit traces for providing electrical connection to another of the subassemblies.
A joining layer is located between each of the subassemblies wherein the joining layer comprises dielectric layers disposed about an internal electrically conductive layer wherein the electrically conductive layer has a via and the dielectric layer each have a via of smaller diameter than the via in the electrically conductive layer and aligned with the via in the electrically conductive layer. The via in the dielectric layers and electrically conductive layers are filled with electrically bondable electrically conductive material for providing electrical connection between the subassemblies.
A conductive member is located between the joining layer and the subassemblies.
The structure is then laminated to cause bonding of the joining layer to the subassemblies.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the description is to be regarded as illustrative in nature and not as restrictive.
REFERENCES:
patent: 5026624 (1991-06-01), Day et al.
patent: 5129042 (1992-07-01), Jeong
patent: 5191174 (1993-03-01), Chang et al.
patent: 5229550 (1993-07-01), Bindra et al.
patent: 5300402 (1994-04-01), Card, Jr. et al.
patent: 5435057 (1995-07-01), Bindra et al.
patent: 5509200 (1996-04-01), Frankeny et al.
patent: 5558928 (1996-09-01), DiStefano et al.
patent: 5677576 (1997-10-01), Akagawa
patent: 5745533 (1998-04-01), Asada et al.
patent: 5817404 (1998-10-01), Kawakita et al.
patent: 5876842 (1999-03-01), Duffy et al.
Lauffer John M.
Markovich Voya R.
Miller Thomas R.
Papathomas Konstantinos I.
Wilson William E.
Fraley Lawrence R.
International Business Machines - Corporation
Lam Cathy
LandOfFree
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