Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1996-12-18
1999-10-26
Palys, Joseph E.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 47, 714 57, G06F 1100
Patent
active
059745657
ABSTRACT:
A composite computer system which includes a plurality of processors connected to each other by a communication apparatus, an operation supervisory unit for recording operating conditions of the processors when the processors are activated or deactivated, an operation supervisory network for connecting the processors and the operation supervisory unit and a program condition management apparatus for recording operating conditions of programs when the programs of the processors are activated or deactivated. The operation supervisory unit obtains, for fault location purposes, the operating conditions of the processors recorded in the operation supervisory unit via the operation supervisory network and the operating conditions of the programs recorded in the program condition management apparatus.
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Maeda Shingo
Morishima Hiroshi
Morishima Kikuko
Okuhara Susumu
Hitachi , Ltd.
Palys Joseph E.
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