Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
1999-12-23
2001-07-17
Picardat, Kevin M. (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S108000, C438S121000, C257S669000
Reexamination Certificate
active
06261863
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a component useful in making electrical connections to microelectronic elements such as semiconductor chips, and to methods of manufacturing such components.
BACKGROUND OF THE INVENTION
Certain techniques for making semiconductor chip assemblies and similar microelectronic assemblies employ releasably attached leads. One such process is disclosed in commonly assigned, U.S. Pat. No. 5,518,964, the disclosure of which is hereby incorporated by reference herein. In certain preferred embodiments described in U.S. Pat. No. 5,518,964, a first element such as a dielectric layer in a connection component is provided with a plurality of elongated, flexible leads extending along a surface of the element. Each lead has a terminal end permanently attached to the first element and has a tip end offset from the terminal end. The tip ends of the leads may be releasably secured to the first element. A second element such as a semiconductor chip having contacts thereon is engaged with the first element or connection component, and the tip ends of the leads are bonded to contacts on the chip or second element. The elements are then moved away from one another so as to deform the leads and provide vertically extensive leads extending between the first and second elements, i.e., between the chip and the connection component. A compliant material may be introduced between the chip and the connection component.
The resulting structure allows the chip to move relative to the connection component without substantial stresses on the leads, and thus provides compensation for thermal expansion. The preferred structures can be readily tested and can be mounted on a further substrate such as a printed circuit panel or the like. Preferred embodiments of the processes disclosed in U.S. Pat. No. 5,518,964 can be used with chips or the microelectronic element having large numbers of terminals. In the preferred processes, many leads can be deformed simultaneously. In particularly preferred processes according to U.S. Pat. No. 5,518,964, the leads on a given connection component or first element may be connected to contacts on a plurality of chips such as an array of several chips or numerous chips formed as part of a wafer, so that many leads are deformed simultaneously.
In certain embodiments disclosed in U.S. Pat. No. 5,518,964, the tip end of each lead is bonded to the surface of the first element by a small spot of a base metal such as copper interposed between the tip end and the surface. Typically, such a spot is formed by a process in which the leads are formed from an etch-resistant metal such as gold overlying a continuous layer of the base metal. The leads have wide portions at the tip and terminal ends. The component is then subjected to an etching process so as to undercut the lead and remove the base metal from beneath the etch-resistant metal at all locations except at the terminal end and at the tip end. At the tip end, most, but not all of the base metal is removed from beneath the etch-resistant metal, leaving a very small spot of the base metal. The strength of the bond between the tip and the connection component surface is effectively controlled by the size of the spot. Thus, although the base metal may provide a relatively high bond strength per unit area or per unit length, it may still provide a weak attachment. Although structures such as frangible lead sections and small buttons can provide useful releasable attachments for the tip ends of the leads, some care is required in fabrication to form these features. For example, formation of spots of uniform size beneath the terminal ends of leads on a large connection component requires careful control of the etching process.
As described in PCT International Publication WO 94/03036, the disclosure of which is hereby also incorporated herein by reference, a connection component may incorporate a support structure such as a polyimide or other dielectric layer with one or more gaps extending through such layer. Preferably, the support structure incorporates one or more flexible or compliant layers. The connection component may further include leads extending across the gap. Each lead has a first or terminal end permanently secured to the support structure on one side of the gap, and a second end releasably attached to the support structure on the opposite side of the gap. In preferred processes as taught by the '036 publication, the connection component is positioned on a semiconductor chip or other microelectronic element. Each lead is engaged by a bonding tool and forced downwardly into the gap, thereby detaching the releasably connected second end from the support structure. The leads are flexed downwardly into the gap and bonded to the contacts on the chip or the microelectronic element. Preferred connection components and processes according to the '036 publication also provide highly efficient bonding processes and very compact assemblies. The finished products provide numerous advantages such as compensation for thermal expansion, ease of testing and a compact configuration.
Other structures disclosed in the '036 publication and in U.S. Pat. No. 5,518,964 employ frangible lead sections connecting the releasable end of each lead to another structure permanently mounted to the support structure or first element. Frangible sections can also provide useful results. However, such frangible elements are most commonly formed by using the photo-etching or selective deposition processes used to form the lead itself to form a narrow section. The minimum width at the narrow section, can be no less than the smallest width formable in the process. As the other portions of the lead adjacent the narrow section must be wider than the narrow section, these other portions must be larger than the minimum attainable in the process. Stated another way, the leads made by such a process generally are wider than the minimum line width attainable in the formation process. This limits the number of leads which can be accommodated in a given area.
In other embodiments disclosed in the '036 publication, the first or permanently mounted terminal end of a lead may have a relatively large area, whereas the second or releasably mounted end of the lead overlying the support structure may have a relatively small area, so that such second end will break away from the support structure before the first end when the lead is forced downwardly by the bonding tool. This arrangement requires careful control of the dimensions of the ends to control the area of the bond between the lead end and the support structure and also requires a lead wider than the smallest element formable in the process.
As described in the '036 publication, and as further described in commonly assigned International Publication WO 97/11588, the disclosure of which is also incorporated by reference herein, leads used in these and other microelectronic connection components may include polymeric layers in addition to metallic layers. The polymeric layers structurally reinforce the leads. For example, certain leads described in the '588 publication incorporate a pair of thin conductive layers such as metallic layers overlying opposite surfaces of a polymeric layer. One conductive layer may be used as a signal conductor, whereas the opposite conductive layer may act as a potential reference conductor. The composite lead thus provides a stripline extending along the lead. A stripline lead of this nature can provide a low, well-controlled impedance along the lead, which enhances the speed of operation of the circuit formed by the connection component and the associated microelectronic elements. The potential reference conductor also helps to reduce crosstalk or undesirable inductive signal coupling between adjacent leads.
In certain embodiments disclosed by commonly assigned U.S. patent application Ser. No. 09/020,750, filed Feb. 9, 1998, the disclosure of which is hereby incorporated by reference herein, a starting struc
Beroz Masud
DiStefano Thomas H.
Faraci Anthony B.
Fjelstad Joseph
Haba Belgacem
Collins D. M.
Lerner David Littenberg Krumholz & Mentlik LLP
Picardat Kevin M.
Tessera Inc.
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