Complimentary metal oxide silicon low voltage positive...

Details Complimentary metal oxide silicon low voltage positive... Complimentary metal oxide silicon low voltage positive...

2007-03-06

2007-03-06

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S090000, C326S126000, C326S127000

Reexamination Certificate

active

11037346

ABSTRACT:
A low voltage positive emitter coupled logic (LV-PECL) buffer fabricated in the complimentary oxide metal silicon (CMOS) process. The LV-PECL buffer in CMOS is operable for a wide frequency range from DC to frequencies as high as 800 MHZ in 0.5 um process. Synchronized feedforward logic is utilized without the need for a feedback loop. N-MOSFET's, which are faster than P-MOSFET's, are used for the implementation of switched current sources. The switched current sources deliver a pull-up current variable in time and as a result have more than two values. The pull-up current is sharply increased in value during the output waveform transition times in an impulse manner.

REFERENCES:
patent: 6909310 (2005-06-01), Poulton et al.
patent: 7039118 (2006-05-01), Segaram

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