Compliant interconnect for testing a semiconductor die

Details Compliant interconnect for testing a semiconductor die Compliant interconnect for testing a semiconductor die

1997-11-28

2000-05-30

Graybill, David E.

Metal working

Barrier layer or semiconductor device making

H01L 2100, H01L 2164

Patent

active

060686693

ABSTRACT:
A compliant interconnect for making a temporary (or permanent) electrical connection with a semiconductor die. The compliant interconnect includes raised contacts having penetrating projections for penetrating contact locations on the die (e.g., bond pads) to a limited penetration depth. In an illustrative embodiment the raised contacts are formed on a silicon substrate as raised pillars with a hollow etched interior portion. A tip of the raised contacts is formed as a thin flexible membrane to permit a desired amount of flexure or compliancy under loading from the die held in a test fixture. In an alternate embodiment the raised contacts are formed on a hollow flexible base portion. In another alternate embodiment the raised contacts are formed on a flexible membrane mounted to a support substrate having etched pockets filled with an elastomeric material.

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