Complementary tuned mixer

Details Complementary tuned mixer Complementary tuned mixer

1999-08-24

2001-05-29

Tran, Toan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific input to output function

Combining of plural signals

C327S356000

Reexamination Certificate

active

06239645

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a mixer circuit used for frequency conversion of carrier frequency in radio communication system.
A mixer circuit is used for frequency conversion in a radio transceiver. A mixer circuit operates to multiply two analog signals for frequency conversion. A Gilbert cell type mixer circuit has been known for an integrated mixer circuit.
FIG. 8
shows a prior Gilbert cell type mixer circuit which used MOSFET elements. The symbols MN
1
and MN
2
show N-channel MOS transistors constituting a first differential pair
1
. A gate of those transistors accepts local frequency signals LO (LO+, LO−) in differential form. The symbols MN
3
and MN
4
are N-channel MOS transistors constituting a second pair
2
, having a gate similarly accepting local frequency signals LO (LO+, LO−). The symbols MN
5
and MN
6
are N-channel MOS transistors constituting a third pair
3
A. Each gate of those transistors accepts high frequency signal RF (RF+ and RF−) in differential form, respectively. The symbol MN
7
is an N-channel MOS transistor which operates as a current source. The symbols RL
1
and RL
2
are a load resistor common to the first pair
1
and the second pair
2
.
In the Gilbert cell type mixer circuit in
FIG. 8
, the transistors MN
5
and MN
6
converts high frequency signal RF into differential current form, and each of the transistors MN
1
through MN
4
switches said current according to the local frequency signal LO, so that the product of the high frequency signal RF and the local frequency signal LO is obtained at one terminal of the loads RL
1
and RL
2
to provide intermediate frequency signal IF (IF+, IF−) in differential form.
By the way, a wireless transceiver operates with a battery, and it is preferable that voltage of the battery is as low as possible in view of small size and light weight of a transceiver.
However, the prior Gilbert cell type mixer circuit must have power supply voltage VDD at least 1.5-2.0 V, since the prior Gilbert cell type mixer circuit must have three stacks of transistors (MN
1
, MN
5
and MN
7
), or (MN
3
, MN
6
and MN
7
) et al.
If we try to decrease power supply voltage, high frequency operation is difficult since drain junction capacitance of a transistor increases, therefore, no application to wireless communication is possible.
As mentioned above, as the operation with low power supply voltage less than 1.5 V is impossible, a prior transceiver must have more than two series connected batteries each of which may be a primary battery (1.5 V) or a NiCd type secondary battery (1.2 V). Thus, small sized and/or light weight transceiver has been difficult because of the use of two series connected batteries.
SUMMARY OF THE INVENTION
It is an object of the present invention, therefore, to provide a new and improved tuned mixer by overcoming the disadvantages and limitations of a prior tuned mixer.
It is an object of the present invention to provide a tuned mixer which operates with power supply voltage lower than 1.0 V.
The above and other objects are attained by a complementary tuned mixer circuit comprising; a first series circuit having a first pair of differentially arranged transistors receiving a first multiply signal in differential form, and an impedance circuit which operates as a constant current source; a second series circuit of the similar configuration to said first series circuit; a differential amplifier receiving a second multiply signal and providing a pair of outputs in differential form; said first series circuit and said second series circuit being inserted between a first power terminal (VDD) and a second power terminal, respectively through a respective load resistor (RL
1
, RL
2
); said differential amplifiers being supplied directly by said first power terminal (VDD), and each outputs in differential form being coupled with a junction of said impedance circuit and transistors in said first series circuit and a junction of said impedance circuit and transistors in said second series circuit, respectively; and a product, in differential form, of said first multiply signal and said second multiply signal being obtained at junction of said load resistors and said series circuits.
The transistors composing said first series circuit and said second series circuit have opposite conductivity type to that of the transistors composing said differential amplifier.
Said differential amplifier has differential transistor pair which receive the second multiply signal, and an impedance circuit which operates as a constant current source, each connected in series with said differential amplifier, between the first power supply terminal and the second power supply terminal.
Preferably, said differential amplifier has a pair of capacitors in coupling lines between output lines of the differential amplifier and said series circuits to cut off D.C. current.
When said capacitors are provided in said coupling lines, transistors in the first and the second series circuits may have the same conductivity type as that of transistors in the differential amplifier.
Preferably, said impedance circuit is a parallel resonance circuit having an inductor and a capacitor, and resonating with said first multiply signal or said second multiply signal. As the first multiply signal frequency is in general close to the second multiply signal frequency, when the resonance circuit resonates with one of the multiply signal frequencies, it may have enough impedance to operate as a constant current source for both the multiply signals. When the value Q of the parallel resonance circuit is too high, a resistor is coupled with the resonance circuit in parallel to decrease the value Q. As an impedance circuit has high impedance for high frequency so that it operates as a constant current source, and low resistance for D.C. current so that high D.C. voltage is applied to transistors, it may not necessarily a parallel resonance circuit, but a mere inductor is enough.


REFERENCES:
patent: 5495194 (1996-02-01), Sugawara
patent: 5570056 (1996-10-01), Groe
patent: 5686870 (1997-11-01), Ariie
patent: 5901350 (1999-05-01), Stoichita et al.
patent: 5949285 (1999-09-01), Ando
patent: 6094084 (2000-07-01), Abou-Allam et al.
patent: 0 714 163 A1 (1996-05-01), None
“A 20-V Four-Quadrant CMOS Analog Multiplier”, Babanezhad et al,IEEE Journal of Solid-State Circuits,vol. SC-20, No. 6, Dec. 1985, pp. 1158-1168.
“A CMOS RF-Reciever Front-End for 1 GHz Applications”, Stubbe et al,1998 Symposium on VLSI Circuits Digest of Technical Papers,pp. 80-83.
“A 1.5v 900MHZ Downconversion Mixer”, Razavi,IEEE International Solid State Circuits Conference,vol. 39, pp. 48-49. Feb., 1996.
“A GaAs Single Balanced Mixer MMIC with Built-in Active Balun for Personal Communication Systems”, Koizumi et al,IEEE Microwave and Millimeter-Wave Monolithic Circuits Symposium,pp. 77-80. May, 1995.

Affiliated with

Also associated with

Rating

Complementary tuned mixer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Complementary tuned mixer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Complementary tuned mixer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2492327