Complementary semiconductor device having improved device isolat

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257394, 257630, H01L 2978, H01L 2348, H01L 2708

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active

051810948

ABSTRACT:
A complementary semiconductor device having an improved capability of isolating devices comprises a P well 3 and an N well 2 both formed adjacent to each other on a main surface of a substrate 1, an N type impurity layer formed in the P well 8 on the main surface of the substrate, a P type impurity layer formed in the N well 9 on the main surface of the substrate, an N type region formed at the junction of the N well and the P well 71 on the main surface of the substrate, a first shield electrode 52 formed between the N type impurity layer 8 and the N type region 71 on the main surface of the substrate through an insulating film and a second shield electrode 51 formed between the N type region 71 and the P type impurity layer 9 on the main surface of the substrate through an insulating film. The first shield electrode 52 is connected to a potential V.sub.SS and the second shield electrode 51 and the N type region 71 are connected to a potential V.sub.CC, so that an N channel MOS transistor 101 comprising the first shield electrode 52 does not turn on and a device comprising the second shield electrode does not form a field effect transistor.

REFERENCES:
patent: 4466171 (1984-08-01), Jochems
patent: 4476482 (1984-10-01), Scott et al.
patent: 4700212 (1987-10-01), Okazawa
patent: 4947228 (1990-08-01), Gabara
Riseman, "Forming complementary metal oxide semiconductor FET transistors", IBM TDB, vol. 16, No. 9, Feb./1974, pp. 2897.

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