Complementary pass-transistor logic circuit and...

Details Complementary pass-transistor logic circuit and... Complementary pass-transistor logic circuit and...

2008-07-01

2008-07-01

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

C326S112000, C326S114000, C326S119000, C326S120000

Reexamination Certificate

active

11283852

ABSTRACT:
A complementary pass-transistor logic includes input nodes provided with first complementary signals; intermediate nodes for outputting complementary intermediate signals; a logic network comprised of NMOS transistors, the network being connected between the input nodes and the intermediate nodes, and the conduction states of the transistors being controlled by second complementary input signals to output a logical operation result of the first and second input signals to the intermediate nodes; and inverters for inverting the intermediate signals and producing complementary output signals, wherein the NMOS transistors of the logic network are configured as a depletion-type NMOS.

REFERENCES:
patent: 4467455 (1984-08-01), Sood
patent: 4939390 (1990-07-01), Coe
patent: 5796624 (1998-08-01), Sridhar et al.
patent: 5909128 (1999-06-01), Maeda
patent: 6232799 (2001-05-01), Allen et al.
Kazuo Yano et al., “A 3.8ns CMOS 16×16—b Multiplier Using Complementary Pass-Transistor Logic”, IEEE Journal of Solid-State Circuits, 25[2]Apr. 1990, pp. 388-395.

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