Complementary logic recovered energy circuit

Details Complementary logic recovered energy circuit Complementary logic recovered energy circuit

1994-05-03

1995-06-20

Hudspeth, David R.

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

326136, H03K 1900

Patent

active

054263824

ABSTRACT:
A circuit derives all power from a single clock input terminal and has no connections to separate power source or power sink terminals. The circuit configuration is applicable to many functions such as inverters, logic gates (NAND, NOR, etc.), and storage elements. When connected to form an inverter function, a current electrode of a first transistor is coupled to the clock input terminal and a control electrode is coupled to a signal input terminal while a second transistor has a current electrode coupled to the clock input terminal and a control electrode coupled the signal input terminal. Both transistors have a second current electrode coupled to an output of the inverter.

REFERENCES:
patent: 4521695 (1985-06-01), Mazin et al.
patent: 5066868 (1991-11-01), Doty, III et al.
Koller & Athas, "Adiabatic Switching, Low Energy Computing, and the Physics of Storing and Erasing Information," Proceedings of Physics of Computation Workshop, Dallas, Tex. Oct. 1992.
Younis & Knight, "Practical Implementation of Charge Recovering Asymptotically Zero Power CMOS", Paper Presented at MIT, Oct. 1992.
Seitz et al, "Hot Clock NMOS" 1985 Chapel Hill Conference on VLSI, 1985.
Hinman et al.,-Recovered Energy Logic-A Highly Efficient Alternative to Today's Logi Circuits, IEEE Power Electronics Specialists Conference, Jun. 20-24, 1993, pp. 17-26.

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