Active solid-state devices (e.g. – transistors – solid-state diode – With means to increase breakdown voltage threshold – With electric field controlling semiconductor layer having a...
Reexamination Certificate
2001-10-09
2003-09-02
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
With means to increase breakdown voltage threshold
With electric field controlling semiconductor layer having a...
C257S329000, C257S492000
Reexamination Certificate
active
06614090
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention lies in the semiconductor technology field. More specifically, the invention relates to a semiconductor component arranged in a semiconductor body according to the principle of charge carrier compensation. The semiconductor component has a semiconductor basic body arranged in the semiconductor body and at least one semiconductor layer arranged in the semiconductor body and adjoining the semiconductor basic body at the boundary layer. The basic body has at least one compensation layer which adjoins the boundary layer and it has first regions of the first conductivity type and second regions of the second conductivity type, which form a grid in the layout. A total quantity of charge of the first regions corresponds approximately to a total quantity of charge of the second regions. The semiconductor layer adjoins the semiconductor basic body at the boundary layer. A multiplicity of doped regions are embedded in the first surface of the semiconductor layer, the doped regions form a grid for a cell array of the semiconductor component.
Furthermore, the invention relates to two methods of fabricating such a semiconductor component.
The invention thus generally relates to semiconductor components according to the principle of charge carrier compensation and, in particular, to the fabrication of such so-called compensation components. The construction and the method of operation of compensation components is known in many cases and described for example in the U.S. Pat. Nos. 5,216,275 and 4,754,310, and also in international PCT publication WO 97/29518 and in German patent DE 43 09 764 C2.
Compensation components are expected in the near future to take a very large market share in particular in the segment of MOS semiconductor components having a high blocking capability; at the present time, the fabrication of such compensation components is still extremely complicated and time-consuming. This can be attributed firstly to the fact that, in contrast to conventional semiconductor components, the structure of a compensation component to be produced is already inherent in the semiconductor body during provision and processing and, therefore, has to be concomitantly taken into account. This means, for example, that in the case of a power MOSFET which is designed as a compensation component and is designed to take up a reverse voltage of 600 volts, for example, a series of five to seven alternating epitaxy and doping steps have to be performed in the construction technique preferably used hitherto. However, the fabrication of a compensation component using epitaxy and doping steps that have to be employed in such an alternating fashion requires a very long time for processing the basic material. A processed basic body is then obtained which, in the region of the active cell array, that is to say below the gate electrode, is prepared in a desired manner.
Furthermore, in conventional compensation components, the cell grid is typically not homogeneous: the cell grid is many times larger in the active region of the cell array than in the edge region, with the result that the edge region and the active region have to be fabricated separately during processing, which is very complicated.
Compared with conventional semiconductor components, which have a homogeneous inner zone grown epitaxially, for example, compensation components have alternating layers of the first and second conductivity types in the grown epitaxial layer. The main difficulty in fabricating compensation components consists in aligning these alternating layers with regard to the grid of the cell array, that is to say they are arranged in a pillar-shaped, v-shaped, u-shaped or similar manner either below the active cell and/or arranged below the gate electrode.
This requirement for aligning the regions of the first and second conductivity types that are introduced into the semiconductor body in a pillar-like manner with the structures of the active cell array makes the entire fabrication process complicated, lengthy and costly.
A further disadvantage of such compensation components is that, for virtually every different cell design, a process for producing the compensation structures which is tailored to the corresponding component in a dedicated manner has to be provided in each case, which process cannot, however, be applied to compensation components having a different cell design. It is thus virtually impossible to decouple the fabrication of the semiconductor basic body and the corresponding cell array. Therefore, for the multiplicity of semiconductor components the corresponding semiconductor basic bodies cannot be preprocessed, which, moreover, also renders the entire fabrication of such compensation components unnecessarily expensive. Furthermore, since in conventional compensation components the actual process for fabricating the transistor structures and the process for fabricating the compensated “starting material” are coupled to one another, these processes cannot be optimized separately.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a semiconductor compensation component and a corresponding production method, which overcome the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which compensation components can be fabricated with the least possible degree of complexity and thus cost-effectively. Furthermore, the invention is based on the object of decoupling, in particular, the process for fabricating the basic material of compensation components from the actual processing of the cell structures.
With the foregoing and other objects in view there is provided, in accordance with the invention, a semiconductor component, comprising:
a semiconductor basic body disposed in a semiconductor body;
said basic body having a compensation layer adjoining a boundary and containing a grid layout of first regions of a first conductivity type and second regions of a second conductivity type, wherein a total quantity of charge of said first regions substantially corresponds to the total quantity of charge of the second regions;
a semiconductor layer disposed in the semiconductor body and adjoining said semiconductor basic body at said boundary;
said semiconductor layer having a first surface with a multiplicity of doped regions embedded therein defining a grid for a cell array of the semiconductor component; and
wherein an alignment of said grid layout of said first and second regions is independent of said grid for the cell array in said semiconductor layer.
In other words, a semiconductor component arranged in a semiconductor body according to the principle of charge carrier compensation is provided,
having a semiconductor basic body arranged in the semiconductor body, which basic body has at least one compensation layer which adjoins a boundary layer and wherein first regions of the first conductivity type and second regions of the second conductivity type are provided, which form a grid in the layout, the total quantity of charge of the first regions approximately corresponding to the total quantity of charge of the second regions,
having at least one semiconductor layer arranged in the semiconductor body and adjoining the semiconductor basic body at the boundary layer, in the first surface of which semiconductor layer a multiplicity of doped regions are embedded, which form a grid for a cell array of the semiconductor component, wherein the grid in the semiconductor layer is not aligned with the grid of the semiconductor basic body.
With the above and other objects in view there are furthermore provided two methods for fabricating the component:
Accordingly, provision is made of a method for fabricating a semiconductor component according to the principle of charge carrier compensation, having the following method steps that are carried out one after the other:
a) a semiconductor body is provided;
b) a compensation layer containing doped regions of the first and/or of the second
Deboy Gerald
Strack Helmut
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Nelms David
Nguyen Dao H.
LandOfFree
Compensation semiconductor component and method of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Compensation semiconductor component and method of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Compensation semiconductor component and method of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3008299