Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
1998-12-21
2003-07-22
Chin, Stephen (Department: 2634)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S326000, C375S327000
Reexamination Certificate
active
06597754
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to electronic communication and, more particularly, to a loop filter in the carrier-recovery loop of a radio receiver.
2. Description of the Related Art
Radio transmission and reception is accomplished through a carrier wave that is modulated to bear the transmitted information. The transmission of the data involves modulating the carrier with a baseband signal that represents the information to be transmitted. Typically, the carrier wave is generated by a reference oscillator in a transmitter unit and modulated by a modulator to produce the transmitted signal. After traversing a communication channel, this signal is received by a receiver unit that demodulates it to extract the baseband signal.
An important component of the receiver unit is a local oscillator that is used to demodulate the received signal. This oscillator must match the frequency of the transmitter oscillator that generated the carrier wave: if the frequencies of the two oscillators are not matched, the receiver cannot efficiently demodulate the transmitted signal. The receiver oscillator can be built so that its natural frequency is close to that of the transmitter oscillator, but due to variations in manufacturing and differences in operating environments there will be drifts between the two oscillators. To compensate for such offsets in frequency between the carrier wave and the receiver oscillator, the receiver oscillator can be locked to the carrier wave by incorporating it into a phase-locked loop (PLL). Such a PLL serves as a carrier-recovery loop that ties the frequency of the receiver oscillator to the frequency of the transmitter oscillator.
In addition to the receiver oscillator, the carrier-recovery loop includes a phase detector and a loop filter. The phase detector generates an error signal to represent the difference in phase between the receiver oscillator and the carrier wave. Since the original carrier wave is not typically available to the receiver unit, the phase detector must be able to extract the frequency of the carrier wave from the received signal. That is, it must be able to ignore variations in the received signal's phase that are due to the information encoded onto the carrier. For example, in the case of a digital communication system using differential-quadriphase-shift-keying (DQPSK) modulation, changes in the phase of the carrier by multiples of 90° must not be interpreted as a drift in the receiver oscillator's phase. Depending on the type of modulation, there are several established methods of making the phase detector in the carrier-recovery loop insensitive to the phase shifts due to data-bearing modulation.
The loop filter in the carrier-recovery loop receives the error signal from the phase detector. The error signal is filtered in the loop filter into a feedback signal. The feedback signal is then used to adjust the frequency of the receiver oscillator so that it tracks the frequency of the received signal. The filtering typically includes a low-pass filtering characterized by several gain coefficients that determine the speed and sensitivity of the PLL. Large gain coefficients lead to a fast PLL, which reduces the time lag for the receiver oscillator to track the carrier wave. However, with the faster PLL comes a reduced robustness of the lock: a faster PLL is more susceptible to having its oscillator's phase shifted out of lock by noise in the received signal. Once the lock is lost it can be reacquired, but it may have a phase error (of 2n&pgr;) called a cycle-slip.
Since a fast PLL and a low incidence of cycle-slips are both desirable qualities, the desirable values for the gain coefficients are trade-offs between speed and robustness. There are several factors that determine the desired values of the gain coefficients. In qualitative terms, high gain coefficients (leading to a fast PLL) are appropriate if the received signal has a stable, slowly varying frequency that is close to the frequency of the receiver oscillator. This is the case for low-noise transmissions when the receiver oscillator is already locked to a good received signal. For these signals, a fast PLL keeps the receiver oscillator tightly locked to the received signal. There is, however, an upper limit on the speed of the PLL because the faster its response, the more susceptible it is to cycle slips. In general, lower PLL speeds are required for noisier received signals.
The gain coefficients also need to be adjusted as the recovery loop switches between different operating modes. The previously described tradeoff between PLL speed and sensitivity to noise applies when the PLL is tracking the received signal. There is an appropriate range of values for the gain coefficients in this tracking mode. Another mode of operation for the PLL is when it initially acquires a phase lock to a received signal. During this acquisition mode, higher values of the gain coefficients are necessary so that the receiver oscillator can quickly approach the frequency of the received signal. A third mode of operation is the hold mode, when the receiver oscillator is kept at a fixed frequency, ignoring the received signal. This mode is desirable, for example during temporary losses of the received signal during fades. In the hold mode, some or all of the gain coefficients are zeroed so that no new feedback is provided to the receiver oscillator.
The determination of the quantitative values for the gain coefficients depends on the amplitudes of the received signal, the noise in the received signal, and the hardware used in the implementation of the PLL. None of theses factors can be perfectly predetermined. In addition it depends on the operating mode of the recovery loop. The received amplitudes and noise will vary with the conditions of the receiver's use, the hardware is subject to variations in manufacturing processes, and the recovery loop will switch between different modes during operation. Because of these variations, PLLs are generally made with an array of loop filters with different combinations of gain coefficients. The filter with the most appropriate gain coefficients is selected during operation of the receiver to place the recovery loop in an appropriate operating mode.
A loop filter typically generates an output that is a linear combination of two components: the input phase error signal and the time-integral of this input. Therefore, some form of an integrator is a standard component of the loop filter, and the integrator's time constant determines one of the filter's gain coefficients. The integrators are typically analog devices that rely on the physical properties and dimensions of their components to determine their outputs. These parameters can vary under different operating conditions, making the output a less controllable signal and introducing a limitation on the prior art carrier-recovery loops. The limited selection and low tolerance of these analog components in a filter circuit limit the flexibility and tolerance of the gain coefficients.
In some applications, carrier recovery loops are incorporated into time-division duplexing (TDD) or time-division multiple access (TDMA) transceivers, in which the system alternates between receiving and transmitting data. It is a well-known problem in TDD and TDMA radio architecture to have frequency shifts in reference oscillators between transmission and reception modes. This frequency pulling occurs due to operating differences between the transmission and reception modes, such as changes in the output impedance of a reference oscillator.
SUMMARY OF THE INVENTION
Described herein is a carrier-recovery loop for compensating frequency pulling in TDD and TDMA radio transceivers. The carrier-recovery loop preferably generates a reference signal whose frequency matches the frequency of a received signal. The system includes a signal input for the received signal, a digitally controlled oscillator (DCO) that generates the reference signal, a phase detector co
Janesch Stephen T.
Schnizlein Paul
Chin Stephen
DSP Group Inc.
Fan Chieh M.
Hood Jeffrey C.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
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