Compensating circuit for MOSFET analog switches

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

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327317, 327362, 327378, G11C 2702

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active

054791219

ABSTRACT:
This invention deals with the problem of an error voltage in a MOSFET analog switch sample and hold circuit caused by the turn off charge in the MOSFET analog switch. The invention provides a compensating circuit which can be adjusted to exactly compensate for the turn off charge which causes the error so that the error can be reduced to zero or nearly zero. The compensating circuit can be used in both open loop and closed loop sample and hold circuits. The compensating circuit can be used in combination with a Miller feedback circuit for eliminating the error voltage.

REFERENCES:
patent: 3969636 (1976-07-01), Baertsch et al.
patent: 4604584 (1986-08-01), Kelley
patent: 4894620 (1990-01-01), Nagaraj
patent: 5343089 (1994-08-01), Itakura et al.
"Switch Induced Error Voltage on a Switched Capacitor" by Sheutthe, IEEE Journal of Solid State Circuits, vol. SC-19, No. 4, Aug. 1984, pp. 519-525.
"Measurement & Modeling of Charge Feed Through in n-Channel MOS Analog Switches" by Wilson et al, IEEE Journal of Solid State Circuits, vol. SC-20, No. 6, Dec. 1985 pp. 1206-1212.
"Measurement & Analysis of Charge Injection in MOS Analog Switches" by Shieh et al, IEEE Journal of Solid State Circuits, vol. SC-22, No. 2, Apr. 1987, pp. 277-281.
"Charge Injection in Analog MOS Switches" by Wegmann et al, IEEE Journal of Solid State Circuits, vol. SC-22, No. 6, Dec. 1987, pp. 1091-1097.
"New Observation of Charge Injection in MOS Analogue Switches" by Chen et al, Electronics Letters, vol. 30, No. 3, Feb. 3, 1994, pp. 213-214.
"All-MOS Charge Redistribution Analog-to-Digital Conversion Techniques-Part I" by McCreary & Gray, IEEE Journal of Solid State Circuits, vol. SC-10, No. 6, Dec. 1975, pp. 371-379.
"An 8-Bit 50-MHz CMOS Subranging A/D converter with Pipelines Wide-Band S/H" by Ishikawa & Tosukahara, IEEE Journal of Solid State Circuits, vol. 24, No. 6, Dec. 1989, pp. 1485-1491.
"A High Speed Sample-and-Hold Technique Using A Miller Hold Capacitance," by Lim & Wooley, IEEE Journal of Solid State Circuits, vol. 26, No. 4, Apr. 1991, pp. 643-651.
"Dummy Transistor Compensation of Analog MOS Switches" by Eichenberger & Guggenbuhl, IEEE Journal of Solid State Circuits, vol. 24, No. 4, Aug. 1989, pp. 1143-1145.
"On Charge Injection in Analog MOS Switches & Dummy Switch Compensation Techniques" by Eichenberger & Guggenbuhl, IEEE Transactions on Circuits And Systems, vol. 37, No. 2, Feb. 1990, pp. 256-264.

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