Compensated sense circuit for storage devices

Details Compensated sense circuit for storage devices Compensated sense circuit for storage devices

1991-11-13

1994-01-25

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Differential sensing

365208, G11C 11413

Patent

active

052821692

ABSTRACT:
The sense circuit recognizes the virgin or programmed status of cells in storage devices (e.g. non-volatile memories of the type with unbalanced loads), and includes a sense amplifier (SA) having a first input (Y) connected to a number of selectable virgin reference cells (T.sub.vr1, T.sub.vr2) and a second input (X) connected to a number of selectable matrix cells (T.sub.vm, T.sub.pm). According to the invention, the current path of a compensatory programmed cell (NP) is connected between a reference voltage and the first input (Y) of the sense amplifier (SA), with the gate of the compensatory programmed cell being connected to a voltage source (Vs) which selects the compensatory programmed cell at least while the sense amplifier reads a selected matrix cell.

REFERENCES:
patent: 5040148 (1991-08-01), Nakai et al.
patent: 5148063 (1992-09-01), Hotta
patent: 5148397 (1992-09-01), Kokubun
patent: 5157626 (1992-10-01), Watanabe

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