Comparators capable of output offset calibration

Details Comparators capable of output offset calibration Comparators capable of output offset calibration

2006-12-26

2006-12-26

Le, Don (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

C326S083000, C326S115000

Reexamination Certificate

active

07154294

ABSTRACT:
Comparators outputting offset calibration. A MOS current mode logic (MCML) circuit receives input signals and generates differential logic signals on output terminals thereof, and comprises a calibration unit coupled to the output terminals, calibrating output offsets at the output terminals according to digital calibration codes. An output stage is coupled to the differential logic signals at the output terminals of the MCML circuit to amplify the differential logic signal and generating a comparison resulting signal. By adjusting the digital calibration codes applied to the calibration unit, current on the output terminals can be adjusted, such that output offsets at the output terminals of the MCML circuit10can be eliminated.

REFERENCES:
patent: 6437599 (2002-08-01), Groen
patent: 6704365 (2004-03-01), Haycock
patent: 6825707 (2004-11-01), Viehmann et al.

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